公开(公告)号：US5495186A

公开(公告)日：1996-02-27

申请号：US275008

申请日：1994-07-13

申请人： Nobuaki Kanazawa ,  Masao Mizukami ,  Kunihiro Ito

发明人： Nobuaki Kanazawa ,  Masao Mizukami ,  Kunihiro Ito

IPC分类号： G06F3/00 ,  H03K3/3565 ,  H03K17/04 ,  H03K17/687 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/0948 ,  H03K3/2897

CPC分类号： H03K3/3565

摘要： A differential type MOS transmission circuit includes a signal driving circuit and a signal receiving circuit to realize high speed transmission for a short distance transmission between different LSIs, etc. A pair of transmission lines between the signal driving circuit and the signal receiving circuit are driven by a pair of drivers in the signal driving circuit so as to take either one of three states, i.e. one state where both of the lines are in a precharged states and two states where either one of the lines is in a discharged state. A signal driving circuit includes signal generating circuits generating variations in control signals varying pulse-like in response to rise and fall of an input signal to thereby obtain the discharge state. The signal receiving circuit generates an output signal depending on the state of the transmission lines and is constructed of a Schmitt trigger circuit with a hysteresis characteristic, for which an input threshold voltage for output logical values has a level smaller than a potential difference between the precharged level and the discharged level.

摘要翻译： 差分型MOS发送电路包括信号驱动电路和信号接收电路，以实现不同LSI之间的短距离传输的高速传输等。信号驱动电路和信号接收电路之间的一对传输线由 信号驱动电路中的一对驱动器，以便采取三种状态中的任何一种，即两条线都处于预充电状态的一种状态和两条线中的任一条处于放电状态的两种状态。 信号驱动电路包括信号发生电路，其产生响应于输入信号的上升和下降而脉冲变化的控制信号的变化，从而获得放电状态。 信号接收电路根据传输线的状态产生输出信号，并且由具有滞后特性的施密特触发电路构成，输出逻辑值的输入阈值电压的电平小于预充电的电位差 水平和排放水平。

公开(公告)号：US4806791A

公开(公告)日：1989-02-21

申请号：US119080

申请日：1987-11-10

申请人： Yasuo Mizuide

发明人： Yasuo Mizuide

IPC分类号： H03K3/0233 ,  H03K3/2897 ,  H03K5/24 ,  H03K5/12

CPC分类号： H03K3/2897

摘要： A differential comparator of the hysteresis type is responsive to a high input difference voltage (V.sub.1 -V.sub.2). The comparator comprises two differential transistors; a hysteresis resistor connected between the emitters of the two transistors; current source means connected to one of the emitters of the two transistors, for determining an emitter current of the two transistors directly and via the hysteresis resistor; and an emitter current controller for controlling the emitter current of the two transistors on the basis of an output current derived from an output terminal. When a voltage difference between the two input terminals reaches a balanced hysteresis voltage value, and therefore no output current flows, the output current is sharply increased in a direction opposite to the preceding direction.

摘要翻译： 滞后类型的差分比较器响应高输入差分电压（V1-V2）。 比较器包括两个差分晶体管; 连接在两个晶体管的发射极之间的迟滞电阻器; 电流源装置连接到两个晶体管的一个发射极，用于直接和经由迟滞电阻确定两个晶体管的发射极电流; 以及发射极电流控制器，用于基于从输出端子导出的输出电流来控制两个晶体管的发射极电流。 当两个输入端子之间的电压差达到平衡滞后电压值，因此没有输出电流流过时，输出电流在与先前方向相反的方向上急剧增加。

公开(公告)号：US4730126A

公开(公告)日：1988-03-08

申请号：US900965

申请日：1986-08-27

申请人： Martin Chen

发明人： Martin Chen

IPC分类号： H03K3/2897 ,  H03K3/011 ,  H03K3/0233 ,  H03K3/037 ,  H03K17/14 ,  H03K17/30

CPC分类号： H03K3/0377 ,  H03K3/011

摘要： A hysteresis circuit is disclosed in which a first signal path, including a hysteresis feedback loop, is separate from a second signal path that is used to carry data. When the signal input to the hysteresis circuit (also referred to hereinafter as the "input signal") crosses a first preselected hysteresis reference of ("threshold") level, the hysteresis feedback loop, which includes threshold adjustment means, will cause a change in the threshold from the first preselected level to a second preselected level. This adjustment of threshold level will take place in parallel with the data being propagated to the output over said separate second signal path. A subsequent crossing of the second preselected threshold level by said input signal will cause the first threshold level to the reset and so on. According to the preferred embodiment of the invention, the threshold adjustment means included in said first signal path further includes a temperature compensation string, current switching means and means which act as an anti-hysteresis killer to speed up the operation of the hysteresis circuit. This novel combination is operative to assure a preselected minimum hysteresis window over the 210.degree. C. temperature range between -55.degree. C. and 155.degree. C., and renders the hysteresis circuit suitable for use in both military applications and other hostile environments. Furthermore, according to the preferred embodiment of the invention, the hysteresis cirucit has a PNP input stage to reduce I.sub.IL and accordingly improve the input chracteristics of the circuit, particularly fan-in. The circuit also features a low I.sub.CC and is designed to be self-compensating with respect to manufacturing disparities inherent in components used to fabricate the circuit itself.

摘要翻译： 公开了一种滞后电路，其中包括滞后反馈回路的第一信号路径与用于承载数据的第二信号路径分离。 当输入到迟滞电路（以下也称为“输入信号”）的信号跨越（“阈值”）电平的第一预选迟滞参考时，包括阈值调整装置的滞后反馈回路将导致 从第一预选级别到第二预选级别的阈值。 该阈值电平的调整将与数据在所述单独的第二信号路径上传播到输出端并行发生。 第二预选阈值电平随后通过所述输入信号的交叉将导致第一阈值电平复位等等。 根据本发明的优选实施例，包括在所述第一信号路径中的阈值调节装置还包括温度补偿串，电流切换装置和用作加速迟滞电路的操作的抗滞后抑制器的装置。 这种新颖的组合可操作以确保在-55℃和155℃之间的210℃温度范围内的预选的最小滞后窗，并使滞后电路适用于军事应用和其他恶劣环境。 此外，根据本发明的优选实施例，滞后电路具有PNP输入级以减少IIL，并因此提高电路的输入特性，特别是扇入。 该电路还具有低ICC，并且被设计为对于用于制造电路本身的部件中固有的制造差异而进行自补偿。

公开(公告)号：US4556805A

公开(公告)日：1985-12-03

申请号：US529880

申请日：1983-09-06

申请人： Masashi Shoji

发明人： Masashi Shoji

IPC分类号： H03K3/011 ,  H03K3/02 ,  H03K3/0233 ,  H03K3/2897 ,  H03K5/153

CPC分类号： H03K3/011 ,  H03K3/02337

摘要： A comparator circuit provided with a hysteresis characteristic comprises an amplifier comparing an input voltage with a reference voltage, a voltage-clamping circuit clamping the output voltage of the amplifier at a first stabilized voltage or at a second stabilized voltage in response to the comparison output of the amplifier, and a feedback circuit generating a first feedback voltage or a second feedback voltage as the reference voltage in response to the output voltage level of the amplifier, whereby the hysteresis voltage of the comparator circuit is substantially independent of the variation in a power supply voltage for actuating the comparator circuit.

摘要翻译： 具有滞后特性的比较器电路包括：将输入电压与参考电压进行比较的放大器;钳位电路，其在第一稳定电压或第二稳定电压下钳位放大器的输出电压， 放大器以及响应于放大器的输出电压电平而产生第一反馈电压或第二反馈电压作为参考电压的反馈电路，由此比较器电路的滞后电压基本上与电源的变化无关 用于启动比较器电路的电压。

公开(公告)号：US4554468A

公开(公告)日：1985-11-19

申请号：US510044

申请日：1983-07-01

申请人： Robert C. Rumbaugh ,  Ira Miller

发明人： Robert C. Rumbaugh ,  Ira Miller

IPC分类号： H03K3/2897 ,  H03K5/24

CPC分类号： H03K3/2897

摘要： A self latching comparator circuit has upper and lower input offset voltages associated therewith to establish hysteresis in response to a differential input signal. The comparator circuit comprises a differential amplifier adapted to receive a differential input signal and first and second parallel current mirror circuits for producing upper and lower input offset voltages when each are respectively activated. Antisaturation means are provided for preventing the current mirror circuits from saturating. An output circuit is also provided which does not load the differential output and therefore provides for a well controlled hysteresis.

摘要翻译： 自锁定比较器电路具有与其相关联的上部和下部输入偏移电压，以响应于差分输入信号建立滞后。 比较器电路包括适于接收差分输入信号的差分放大器，以及当各自分别激活时产生上和下输入偏移电压的第一和第二并联电流镜电路。 提供了抗饱和装置，用于防止电流镜电路饱和。 还提供了一个输出电路，它不加载差分输出，因此提供良好控制的滞后。

公开(公告)号：US3700924A

公开(公告)日：1972-10-24

申请号：US3700924D

申请日：1972-02-07

申请人： HONEYWELL INC

发明人： FULKERSON DAVID E

IPC分类号： H03K3/26 ,  H03K3/2897 ,  H03K17/14 ,  H03K17/30 ,  H03K17/00

CPC分类号： H03K3/26 ,  H03K3/2897 ,  H03K17/14 ,  H03K17/30

摘要： A snap-acting switching circuit having a temperature independent threshold switching voltage contains a pair of complementary transistors forming a regenerative feedback loop and a differential pair of transistors connected in one of the branches of the feedback loop to control the gain of the loop by a differential voltage.

摘要翻译： 具有温度独立阈值切换电压的快速切换电路包含形成再生反馈回路的一对互补晶体管和连接在反馈回路的一个支路中的差分晶体管对以通过差分来控制环路的增益 电压。

公开(公告)号：US3649852A

公开(公告)日：1972-03-14

申请号：US3649852D

申请日：1971-03-10

申请人： THOMAS K BOHLEY

发明人： BOHLEY THOMAS K

IPC分类号： G01R13/32 ,  H03K3/037 ,  H03K3/2897 ,  H03K17/00

CPC分类号： H03K3/037 ,  G01R13/32 ,  H03K3/2897

摘要： A triggering circuit for producing an oscilloscope sweep trigger signal employing a pair of parallel current paths, one path including one input of a first logic gate and a current control device coupled thereto and the second path including one input of a second logic gate and a second current control device coupled thereto. Feedback circuits couple the output of each gate to said input of each gate for regenerative feedback. A reset control signal is coupled to a second input of each gate. The output of said one gate is coupled to a third input of said second gate. A sync signal controls each of said current control devices to control the current through each path for operating said gates in sequence, said first gate operating at a preselected level in one half cycle of said sync signal and said second gate operating at a preselected level in the next half cycle of said sync signal to produce said triggering signal.

摘要翻译： 一种用于产生采用一对并行电流路径的示波器扫描触发信号的触发电路，一个路径包括第一逻辑门的一个输入和耦合到其的电流控制装置，第二路径包括第二逻辑门和第二逻辑门的​​一个输入 电流控制装置耦合到其上。 反馈电路将每个门的输出耦合到每个门的所述输入以用于再生反馈。 复位控制信号耦合到每个门的第二输入端。 所述一个栅极的输出耦合到所述第二栅极的第三输入端。 同步信号控制每个所述电流控制装置以控制通过每个路径的电流以顺序地操作所述门，所述第一门在所述同步信号的一个半周期中以预选电平工作，并且所述第二门在预选电平 所述同步信号的下一个半周期产生所述触发信号。

公开(公告)号：US3622805A

公开(公告)日：1971-11-23

申请号：US3622805D

申请日：1969-04-09

申请人： HEWLETT PACKARD CO

发明人： MCMORROW RICHARD H JR

IPC分类号： H03K3/2897 ,  H03K3/315 ,  H03K17/00

CPC分类号： H03K3/2897 ,  H03K3/315

摘要： A trigger circuit uses a pair of tunnel diodes- one acting as a gate and trigger element and the other acting as a control diode for the first- to generate triggering pulses. The circuit interconnections are such that the first tunnel diode provides an output gating pulse only in response to the synchronizing signal having crossed an upper threshold level provided a reset signal has occurred and the synchronizing signal has crossed a lower threshold level. This hysteresis type response to the synchronizing signal permits selective triggering of the circuit.

公开(公告)号：US3519850A

公开(公告)日：1970-07-07

申请号：US3519850D

申请日：1967-10-11

申请人： IBM

发明人： SMITH ROBERT

IPC分类号： G11C11/06 ,  H03K3/2897 ,  H03F1/00 ,  H03K5/20

CPC分类号： G11C11/06007 ,  H03K3/2897

公开(公告)号：US11349460B1

公开(公告)日：2022-05-31

申请号：US17191248

申请日：2021-03-03

申请人： SAUDI ARABIAN OIL COMPANY ,  KING FAHD UNIVERSITY OF PETROLEUM & MINERALS

发明人： Abdulrahman Alshuhail ,  Hussain Alzaher ,  Alaa El-Din Hussein

IPC分类号： H03K3/00 ,  H03K3/2897 ,  G05F1/56 ,  H03F3/45 ,  G05F3/26 ,  H03K5/24

摘要： A current-mode Schmitt Trigger includes a plurality of current output stages connected to a common supply voltage that powers the current-mode Schmitt Trigger, a main input on one of the current output stages that receives an input current, and a non-inverting output on a different one of the current output stages that is shorted to the main input to establish a positive closed-loop feedback and supplies a non-inverting output current as the input current. The current-mode Schmitt Trigger includes only active components.