公开(公告)号：US06625006B1

公开(公告)日：2003-09-23

申请号：US09765200

申请日：2001-01-18

申请人： Farbod Aram ,  Sehat Sutardja

发明人： Farbod Aram ,  Sehat Sutardja

IPC分类号： H01G420

CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： The present invention provides a circuit and method for a fringing capacitor. The fringing capacitor includes at least two conductor layers spaced apart from each other. Each conductor layer includes at least two portions. The portions include odd ones alternating with even ones. Adjacent odd ones and even ones of the portions are spaced apart. The odd ones of the portions on a first one of the conductor layers are configured to substantially overlay the odd ones of the portions on an adjacent one of the conductor layers. The even ones of the portions on the first one of the conductor layers are configured to substantially overlay the even ones of the portions on the adjacent one of the conductor layers. The odd ones of the portions on the first one of the conductor layers are electrically coupled together and to the even ones of the portions on the adjacent one of the conductor layers, thereby defining a first electrode. The even ones of the portions on the first one of the conductor layers are electrically coupled together and to the odd ones of the portions on the adjacent one of the conductor layers, thereby defining a second electrode. A dielectric is interposed between the first and second electrodes. A guardband is spaced from the first and second electrodes.

摘要翻译： 本发明提供了一种边缘电容器的电路和方法。 边缘电容器包括彼此间隔开的至少两个导体层。 每个导体层包括至少两个部分。 这些部分包括与偶数交替的奇数。 相邻的奇数和相邻的部分间隔开。 第一导体层中的奇数部分被配置为基本上覆盖相邻导体层之间的奇数部分。 第一导体层中的部分中的偶数部分构造成基本覆盖相邻导体层之间的偶数部分。 第一导体层上的奇数部分电耦合在一起，并连接到相邻导体层之间的偶数部分，从而限定第一电极。 导体层中的第一层上的部分中的偶数部分电耦合在一起，并连接到相邻导体层上的奇数部分，由此限定第二电极。 电介质介于第一和第二电极之间。 防护带与第一和第二电极间隔开。

公开(公告)号：US06574090B2

公开(公告)日：2003-06-03

申请号：US09822591

申请日：2001-03-30

申请人： Bernd K. Appelt ,  John M. Lauffer

发明人： Bernd K. Appelt ,  John M. Lauffer

IPC分类号： H01G420

CPC分类号： H05K1/162 ,  H05K1/0366 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09309 ,  Y10T428/12569 ,  Y10T428/12597 ,  Y10T428/12903 ,  Y10T428/24124 ,  Y10T428/2476 ,  Y10T428/24994 ,  Y10T428/249952 ,  Y10T428/252 ,  Y10T428/264 ,  Y10T428/265 ,  Y10T428/269

摘要： A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus, the single dielectric sheet does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align, thus greatly reducing the probability of a defect causing a failure in test or field use.

摘要翻译： 提供了一种用于具有改进电容的电路板或芯片载体的电容元件及其制造方法。 该结构由一对导电片形成，其间具有介质成分。 电介质部件由两个或更多个电介质片形成，其中至少一个可部分固化或软化，然后完全固化或硬化。 通过将部分固化或软化的片材层压到至少一种其它电介质材料片和导电材料片之一中来进行层压。 两片电介质组件的总厚度不超过约4密耳，优选不超过约3密耳; 因此，单个电介质片材的厚度不超过约2密耳，优选不超过约1.5密耳。 使用两层或更多层电介质材料使电介质材料片中的两个或多个缺陷非常不可能对齐，从而大大降低了导致测试或现场使用失败的缺陷的可能性。

公开(公告)号：US06205014B1

公开(公告)日：2001-03-20

申请号：US09293950

申请日：1999-04-19

申请人： Yasuyuki Inomata ,  Yoshikazu Okino

发明人： Yasuyuki Inomata ,  Yoshikazu Okino

IPC分类号： H01G420

CPC分类号： H01G4/30

摘要： The multilayer ceramic capacitor has a plurality of dielectric layers and inner layers laminated alternately laminated on one another. In each of the dielectric layers, the rate of ceramic grain which form the dielectric layers and present singly in one dielectric layer over its entire longitudinal thickness is set to amount to 20% or more. The multilayer ceramic capacitor can prevent a decrease in a CR product to a value lower than a desired level even if the dielectric layer becomes as thin as 5 &mgr;m or less. This can comply with demands for a multilayer ceramic capacitor that the number of the dielectric layers to be laminated on the inner electrodes should be increased yet the thickness of the dielectric layers should be made thinner in order to meet requirements for making electronic circuit more compact in size and higher in density.

摘要翻译： 多层陶瓷电容器具有彼此交替层叠的多层电介质层和内层。 在每个电介质层中，形成电介质层并且在其整个纵向厚度上单独存在于一个电介质层中的陶瓷颗粒的速率设定为20％以上。 即使电介质层变薄到5μm以下，多层陶瓷电容器也可以防止CR产物的降低到低于期望值的值。 这可以符合多层陶瓷电容器的要求，即层压在内电极上的电介质层的数量应当增加，同时应使电介质层的厚度更薄，以满足使电子电路更紧凑的要求 尺寸和密度更高。

公开(公告)号：US06477036B2

公开(公告)日：2002-11-05

申请号：US09930862

申请日：2001-08-16

申请人： Hitoshi Kitagawa ,  Makoto Sasaki

发明人： Hitoshi Kitagawa ,  Makoto Sasaki

IPC分类号： H01G420

CPC分类号： H01G4/20 ,  H01L28/40

摘要： The present invention provides a thin-film capacitor which can easily meet requirements of reduction in size, thickness, and weight and which can perform temperature compensation. In addition to the features described above, the present invention provides a thin-film capacitor having a superior Q factor in a high frequency band. The thin-film capacitor of the present invention has at least one first dielectric thin-film and at least one second dielectric thin-film having a dielectric constant different from that of the first dielectric thin-film, wherein these thin-films are provided between a pair of electrodes. In addition, in the present invention, the absolute value of the temperature coefficient of capacitance of the first dielectric thin-film is 50 ppm/° C. or less, and the temperature coefficient of capacitance of the second dielectric thin-film is a negative value and has an absolute value of 500 ppm/° C. or more.

摘要翻译： 本发明提供一种能够容易地满足尺寸，厚度，重量的要求的薄膜电容器，能够进行温度补偿。 除了上述特征之外，本发明提供了一种在高频带中具有优异Q因子的薄膜电容器。 本发明的薄膜电容器具有至少一个第一电介质薄膜和至少一个具有与第一介电薄膜不同的介电常数的第二电介质薄膜，其中这些薄膜位于 一对电极。 此外，在本发明中，第一电介质薄膜的电容温度系数的绝对值为50ppm /℃以下，第二电介质薄膜的电容温度系数为负 值，绝对值为500ppm /℃以上。

公开(公告)号：US06459562B1

公开(公告)日：2002-10-01

申请号：US09863089

申请日：2001-05-22

申请人： Arjun KarRoy ,  Klaus Schuegraf

发明人： Arjun KarRoy ,  Klaus Schuegraf

IPC分类号： H01G420

CPC分类号： H01L21/76834 ,  H01L21/3144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76826 ,  H01L21/76832 ,  H01L28/40 ,  H01L28/60

摘要： An improved thin-film capacitor and methods for forming the same on a surface of a substrate are disclosed. The capacitor includes a bottom conducting plate formed by depositing conductive material within a trench of an insulating layer and planarizing the conducting and insulating layers. A dielectric film is then deposited on the substrate surface, such that at least a portion of the dielectric material remains over the bottom conducting plate. The dielectric film is formed by depositing a first layer of dielectric and then immersing the top of the first layer of dielectric in gaseous plasmas in a single or a series of steps to change the composition of the first layer of deposited dielectric stack. The additional steps of immersion in a plasma is used to improve the desired performance of the dielectric for capacitor applications such as improved reliability, reduced leakage currents and for tuning voltage coefficients of the capacitor. A second conductive layer is then deposited over the surface of the substrate, patterned and etched such that at least a portion of the second conducting material resides over at least a portion of the dielectric material.

摘要翻译： 公开了一种改进的薄膜电容器及其在基板表面上的形成方法。 电容器包括通过在绝缘层的沟槽内沉积导电材料并平坦化导电层和绝缘层而形成的底部导电板。 然后在衬底表面上沉积电介质膜，使得电介质材料的至少一部分保留在底部导电板上。 介电膜通过沉积第一层电介质，然后以单一或一系列步骤将电介质的第一层的顶部浸入气相等离子体中，以改变第一沉积介电层叠层的组成。 使用浸入等离子体中的附加步骤来改善用于电容器应用的电介质的期望性能，例如改进的可靠性，降低的漏电流和用于调谐电容器的电压系数。 然后将第二导电层沉积在衬底的表面上，被图案化和蚀刻，使得第二导电材料的至少一部分驻留在电介质材料的至少一部分上。

公开(公告)号：US06421225B2

公开(公告)日：2002-07-16

申请号：US09333880

申请日：1999-06-15

申请人： Leif Bergstedt

发明人： Leif Bergstedt

IPC分类号： H01G420

CPC分类号： H05K1/162 ,  H05K1/167 ,  H05K3/386 ,  H05K3/4626 ,  H05K2201/015 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0367 ,  H05K2201/09672

摘要： Invention refers to an electric component, preferably a component buried in a Printed Circuit Board (PCB) including at least two conductive layers (13,21, 36; 15, 35) and an intermediate layer (14, 37). The intermediate layer (14, 37) further consists of at least two layers (16, 17, 22, 23, 38, 39, 40): at least a first layer (17, 23, 39) and a second layer (16, 22, 38, 40), which at least first layer has more elastic characteristic than the second layer (16, 22, 38, 40) at a certain temperature and/or pressure.

摘要翻译： 本发明涉及一种电子部件，优选埋入包括至少两个导电层（13,21,36; 15,35）和中间层（14,37）的印刷电路板（PCB）中的部件。 中间层（14,37）还包括至少两层（16,17,22,23,38,39,40）：至少第一层（17,23,39）和第二层（16， 22,38,40），其至少第一层在一定温度和/或压力下具有比第二层（16,22,38,40）更具弹性的特性。

公开(公告)号：US06563690B2

公开(公告)日：2003-05-13

申请号：US09785065

申请日：2001-02-15

申请人： Hiroshi Kishi ,  Hirokazu Chazono ,  Hisamitsu Shizuno

发明人： Hiroshi Kishi ,  Hirokazu Chazono ,  Hisamitsu Shizuno

IPC分类号： H01G420

CPC分类号： H01G4/1227 ,  H01G4/30

摘要： A multilayer ceramic capacitor includes a multilayer ceramic body having alternately stacked ceramic layers and internal electrodes, the ceramic layers containing therein an acceptor representing one or more metallic elements for facilitating a reoxidation process of the multilayer ceramic body, and a pair of external electrodes installed at two opposite sides of the multilayer ceramic body, wherein the acceptor concentration in the ceramic layers stacked at a central portion of the multilayer ceramic body is higher than that in the remaining ceramic layers of the multilayer ceramic body.

公开(公告)号：US06426861B1

公开(公告)日：2002-07-30

申请号：US09337224

申请日：1999-06-22

申请人： M. Zafar A. Munshi

发明人： M. Zafar A. Munshi

IPC分类号： H01G420

CPC分类号： B32B27/00 ,  B32B37/153 ,  B32B2038/0092 ,  B32B2457/16 ,  C08J5/18 ,  C08L23/10 ,  C08L27/16 ,  C08L27/18 ,  C08L67/02 ,  C08L69/00 ,  C08L71/02 ,  C08L81/02 ,  H01G4/18 ,  Y10T29/435 ,  C08L2666/04 ,  C08L2666/14

摘要： A film capacitor includes a novel hybrid polymeric film dielectric in which at least one non-polar dielectric homopolymer resin is blended homogeneously in solid-solution with at least one other dielectric polymer resin. The properties of at least one of the dielectric polymer resin constituents of the hybrid polymeric film dielectric are selected to produce a tailored property or properties of the solid-solution blend thereof. The non-polar homopolymer serves to stabilize the hybrid polymeric film. In the film capacitor configuration, the hybrid polymeric film is tightly sandwiched between conformable metal plates.

摘要翻译： 薄膜电容器包括新颖的复合聚合物膜电介质，其中至少一种非极性电介质均聚物树脂与固溶体中的至少一种其它介电聚合物树脂均匀地共混。 选择复合聚合物膜电介质的介电聚合物树脂组分中的至少一种的性质以产生其固溶体共混物的定制性质或性质。 非极性均聚物用于稳定复合聚合物膜。 在薄膜电容器配置中，复合聚合物薄膜紧密地夹在适形的金属板之间。

公开(公告)号：US06341056B1

公开(公告)日：2002-01-22

申请号：US09573123

申请日：2000-05-17

申请人： Derryl D. J. Allman ,  Brian Bystedt

发明人： Derryl D. J. Allman ,  Brian Bystedt

IPC分类号： H01G420

CPC分类号： H01G4/20

摘要： A capacitor has a pair of plates separated by a capacitor dielectric material which is formed of multiple separate layers of different dielectric materials having different electrical characteristics. The different electrical characteristics are represented by linearity curves that curve relatively oppositely with respect to one another. Combining the different dielectric materials and separate layers achieves selected electrical characteristics from the overall capacitor dielectric material. The capacitor dielectric material may be formed with a top layer, a middle layer and a bottom layer. The middle layer may be formed of relatively high leakage dielectric and/or relatively high dielectric constant material, and the top and bottom layers may be formed of barrier material which is substantially resistant to leakage current and which exhibits a relatively lower dielectric constant.

摘要翻译： 电容器具有由电容器介电材料隔开的一对板，该电容器电介质材料由具有不同电特性的不同介电材料的多个分开的层形成。 不同的电特性由相对于彼此相对相对地弯曲的线性曲线表示。 组合不同的介电材料和分离的层可以实现来自整个电容器介电材料的选定的电特性。 电容器电介质材料可以形成有顶层，中间层和底层。 中间层可以由相对高的泄漏电介质和/或相对高的介电常数材料形成，并且顶层和底层可以由阻挡材料形成，其基本上抵抗漏电流并且具有相对较低的介电常数。

公开(公告)号：US06215649B1

公开(公告)日：2001-04-10

申请号：US09186583

申请日：1998-11-05

申请人： Bernd K. Appelt ,  John M. Lauffer

发明人： Bernd K. Appelt ,  John M. Lauffer

IPC分类号： H01G420

CPC分类号： H05K1/162 ,  H05K1/0366 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09309 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/5102

摘要： A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus the single dielectric sheets does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align thus greatly reducing the probability of a defect causing a failure in test or field use.

摘要翻译： 提供了一种用于具有改进电容的电路板或芯片载体的电容元件及其制造方法。 该结构由一对导电片形成，其间具有介质成分。 电介质部件由两个或更多个电介质片形成，其中至少一个电介质片可被部分固化或软化，然后完全固化或硬化。 通过将部分固化或软化的片材层压到至少一种其它电介质材料片和导电材料片之一中来进行层压。 两片电介质组件的总厚度不超过约4密耳，优选不超过约3密耳; 因此单个电介质片材的厚度不超过约2密耳，优选不超过约1.5密耳。 使用两层或更多层电介质材料使得介电材料片中的两个或多个缺陷非常不可能对齐，从而大大降低了导致测试或现场使用失败的缺陷的可能性。