摘要:
A method of fabricating a c-axis ferroelectric thin film includes preparing a substrate; depositing a layer of ferroelectric material by metal organic chemical vapor deposition, including using a precursor solution having a ferroelectric material concentration of about 0.1 M/L at a vaporizer temperature of between about 140° C. to 200° C.; and annealing the substrate and the ferroelectric material at a temperature between about 500° C. to 560° C. for between about 30 minutes to 120 minutes.
摘要:
A method for crystallizing an amorphous silicon thin-film is provided, in which amorphous silicon thin-films on a large-area glass substrate for use in a TFT-LCD (TFT-Liquid Crystal Display) are crystallized uniformly and quickly by a scanning method using a linear lamp to prevent deforming of the glass substrate. The crystallization method includes the steps of forming an amorphous silicon thin-film on a glass substrate, and illuminating a linear light beam on the amorphous silicon thin-film from the upper portion of the glass substrate according to a scanning method. The crystallization method is applied to a polycrystalline silicon thin-film transistor manufacturing method including the steps of forming an amorphous silicon thin-film on a glass substrate, and crystallizing the amorphous silicon of the thin-film transistor according to a scanning method using a linear light beam. In the scanning illumination of the linear light beam, either one of a supporting member of the glass substrate and a light source is relatively moved by a scanning driver apparatus.
摘要:
A semiconductor device according to the present invention includes a semiconductor substrate; device isolation regions provided in the semiconductor substrate; a first conductivity type semiconductor layer provided between the device isolation regions; a gate insulating layer provided on an active region of the first conductivity type semiconductor layer; a gate electrode provided on the gate insulating layer; gate electrode side wall insulating layers provided on side walls of the gate electrode; and second conductivity type semiconductor layers provided adjacent to the gate electrode side wall insulating layers so as to cover a portion of the corresponding device isolation region, the second conductivity type semiconductor layers acting as a source region and/or a drain region. The gate electrode and the first conductivity type semiconductor layer are electrically connected to each other. The second conductivity type semiconductor layers are provided above the first conductivity type semiconductor layer and have a thickness which gradually increases from the device isolation region toward the gate electrode.
摘要:
A method and apparatus for improving the accuracy of a contact to an underlying layer comprises the steps of forming a first photoresist layer over the underlying layer, forming a mask layer over the first photoresist layer, then forming a patterned second photoresist layer over the mask layer. The mask layer is patterned using the second photoresist layer as a pattern then the first photoresist layer is patterned using the mask layer as a pattern. A tapered hole is formed in the first photoresist layer, for example using an anisotropic etch. The tapered hole has a bottom proximate the underlying layer and a top distal the underlying layer with the top of the hole being wider than the bottom of the hole.