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    Data distribution system and methods for its use
    1.
    发明授权
    Data distribution system and methods for its use 失效
    数据分发系统及其使用方法

    公开(公告)号：US5594730A

    公开(公告)日：1997-01-14

    申请号：US196203

    申请日：1994-12-05

    Applicant: Mark C. Koz ,  Masato Hata

    Inventor： Mark C. Koz ,  Masato Hata

    IPC: G06F3/00 ,  H04N7/14 ,  H04N7/173 ,  H04Q11/04 ,  H04H1/00

    CPC classification number: G06F3/002 ,  H04N7/148 ,  H04N7/17336 ,  H04Q11/04 ,  H04Q11/0442 ,  H04Q11/0471 ,  H04Q2213/052 ,  H04Q2213/055 ,  H04Q2213/058 ,  H04Q2213/103 ,  H04Q2213/202 ,  H04Q2213/205 ,  H04Q2213/208 ,  H04Q2213/36

    Abstract: A subscriber system (10), operating in combination with other similar subscriber systems, for collectively and swiftly distributing multiple copies of digital data to a large number of other subscriber systems. The subscriber system (10) receives digital data and stores it on a storage device (38). An autonomous digital data communication subsystem (42) then obtains a copy of the digital data directly from the storage device (30) and transmits that data to another subscriber system. The autonomous digital data communication subsystem (42) includes transceivers (72, 82, 102 or 104) for exchanging digital data with ISDN communication channels (46, 44a, 44b or 44c). The transceivers (72, 82, 102 or 104) receive the digital data from a random access memory ("RAM") (56) included in the autonomous digital data communication subsystem (42). A SCSI controller (52) exchanges the digital data between the RAM (56) and the storage device (38) of the subscriber system (10). A control signal processor controls the operation of the autonomous digital data communication subsystem (42) including its transceivers (72, 82, 102 and 104).

    Abstract translation: PCT No.PCT / US92 / 04944 Sec。 371日期1994年12月5日第 102（e）日期1994年12月5日PCT提交1992年6月11日PCT公布。 出版物WO93 / 26095 日期：1993年12月23日一种用户系统（10），与其他类似的用户系统结合操作，用于将数字数据的多个副本共同地迅速地分发给大量其他用户系统。 用户系统（10）接收数字数据并将其存储在存储设备（38）上。 然后，自主数字数据通信子系统（42）直接从存储装置（30）获得数字数据的副本，并将该数据发送到另一用户系统。 自主数字数据通信子系统（42）包括用于与ISDN通信信道（46,44a，44b或44c）交换数字数据的收发机（72,82,102或104）。 收发机（72,82,102或104）从包括在自主数字数据通信子系统（42）中的随机存取存储器（“RAM”）（56）接收数字数据。 SCSI控制器（52）在用户系统（10）的RAM（56）和存储设备（38）之间交换数字数据。 控制信号处理器控制包括其收发器（72,82,102和104）的自主数字数据通信子系统（42）的操作。

    Method for multiple access in a digital communication system
    2.
    发明授权
    Method for multiple access in a digital communication system 失效
    一种数字通信系统中多重访问的方法

    公开(公告)号：US5544158A

    公开(公告)日：1996-08-06

    申请号：US191470

    申请日：1994-02-04

    Applicant: Dan Oprea ,  Jacob Cepelinski

    Inventor： Dan Oprea ,  Jacob Cepelinski

    IPC: H04L5/14 ,  H04M9/02 ,  H04Q11/04 ,  H04J3/00

    CPC classification number: H04Q11/0471 ,  H04L5/1492 ,  H04M9/025 ,  H04Q2213/197 ,  H04Q2213/216 ,  H04Q2213/292 ,  H04Q2213/299 ,  H04Q2213/36

    Abstract: A digital data communications system, comprises a master station and a plurality of slave stations communicating with said master station in a multiburst scheme over a digital link having a plurality of communication channels associated respectively with said slave stations. In each frame the master station transmits a master burst over all the channels and the slave stations transmit slave bursts over the respective channels associated therewith.

    Abstract translation: 数字数据通信系统包括主站和多个从站，通过具有分别与所述从站相关联的多个通信信道的数字链路以多波段方案与所述主站通信。 在每个帧中，主站在所有通道上发送主脉冲串，并且从站在与之相关的相应通道上发送从站脉冲串。

    Data multiplexing and separation method
    3.
    发明授权
    Data multiplexing and separation method 失效
    数据多路复用和分离方法

    公开(公告)号：US5228033A

    公开(公告)日：1993-07-13

    申请号：US767379

    申请日：1991-09-30

    Applicant: Fusakichi Okouchi

    Inventor： Fusakichi Okouchi

    IPC: H04N7/08 ,  H04J3/00 ,  H04J3/16 ,  H04J3/22 ,  H04N7/081 ,  H04Q11/04

    CPC classification number: H04Q11/0471 ,  H04J3/1647 ,  H04Q2213/214 ,  H04Q2213/216 ,  H04Q2213/292 ,  H04Q2213/36

    Abstract: The invention is a data multiplexing and separation method. It takes a plural number of timing data from memory that stores the plural number of timing data so as to detect bit positions on frame data signals on which bits respectively affiliated with a plural number of data are arranged. The plural number of timing data is used as the basis to arrange data to the frame data signal by successively arranging bits respectively affiliated with the plural number of data to the frame data signal so that the plural number of data is multiplexed to the frame data signals. And also it extracts a plural number of data from frame data signals by successively taking bits respectively affiliated with multiplexed the plural number of data from the frame data signals on the basis of the plural number of timing signals, and extracts a plural number of the multiplexed data from the frame data signals.

    Abstract translation: 本发明是一种数据复用和分离方法。 从存储多个定时数据的存储器中取出多个定时数据，以便检测分配有多个数据分配的位的帧数据信号上的位位置。 将多个定时数据用作通过将与多个数据相关联的位连续地排列到帧数据信号而将数据排列到帧数据信号的基础，使得多个数据被多路复用到帧数据信号 。 并且还从帧数据信号中提取多个数据，通过连续地根据多个定时信号从帧数据信号中分别附加多路复用多个数据的数据，并提取多个多路复用 来自帧数据信号的数据。

    ISDN user-network interface system
    5.
    发明授权
    ISDN user-network interface system 失效
    ISDN用户网络接口系统

    公开(公告)号：US5309440A

    公开(公告)日：1994-05-03

    申请号：US940040

    申请日：1992-09-03

    Applicant: Hajime Nakamura ,  Hiroyuki Kikuta ,  Fumio Watanabe ,  Masanobu Fujioka

    Inventor： Hajime Nakamura ,  Hiroyuki Kikuta ,  Fumio Watanabe ,  Masanobu Fujioka

    IPC: H04J3/06 ,  H04Q11/04

    CPC classification number: H04Q11/0471 ,  H04J3/0682 ,  H04Q2213/194 ,  H04Q2213/211 ,  H04Q2213/216 ,  H04Q2213/36

    Abstract: An ISDN-user-network interface system comprising an interface buffer and an interface adapter. The interface buffer provided between an ISDN network terminal equipment and a terminal equipment to receive an up-signal frame transmitted from said terminal equipment to said network terminal equipment, to store said up-signal frame, and to transmit said stored up-signal frame at a timing when said network terminal equipment is capable of detecting the synchronization of said up-signal frame. The interface adapter provided between said ISDN network terminal equipment and said terminal equipment, to receive an up-signal frame transmitted from said terminal equipment to said network terminal equipment, to detect D-channel bits of said up-signal frame, to transmit said up-signal frame to said network terminal equipment, to copy said detected D-channel bits into echo channel bits of a down-signal frame from said net-work terminal equipment to said terminal equipment received immediately after the transmission of said up-signal frame, and to transmit said down-signal frame to said terminal equipment.

    Abstract translation: 一种包括接口缓冲器和接口适配器的ISDN用户网络接口系统。 提供在ISDN网络终端设备和终端设备之间的接口缓冲器，用于接收从所述终端设备发送到所述网络终端设备的上行信号帧，以存储所述上行信号帧，并将所述存储的上行信号帧发送到 所述网络终端设备能够检测所述上行信号帧的同步的定时。 所述接口适配器设置在所述ISDN网络终端设备和所述终端设备之间，以接收从所述终端设备发送到所述网络终端设备的上行信号帧，以检测所述上行信号帧的D信道比特，以发送所述上行 对所述网络终端设备进行信号复制，将所述检测到的D信道位复制到从所述网络工作终端设备到所述上行信号帧发送之后立即接收到的所述终端设备的下行信号帧的回声信道位中， 并将所述下行信号帧发送到所述终端设备。

    Equalizer for ISDN-U interface
    6.
    发明授权
    Equalizer for ISDN-U interface 失效
    ISDN-U接口的均衡器

    公开(公告)号：US4995031A

    公开(公告)日：1991-02-19

    申请号：US368239

    申请日：1989-06-19

    Applicant: Sami A. H. Aly ,  Babak Sayar

    Inventor： Sami A. H. Aly ,  Babak Sayar

    IPC: H04B3/23 ,  H04L7/02 ,  H04L25/03 ,  H04Q11/04

    CPC classification number: H04L7/0062 ,  H04B3/235 ,  H04L25/03057 ,  H04Q11/0471 ,  H04B3/238 ,  H04Q2213/19 ,  H04Q2213/214 ,  H04Q2213/36

    Abstract: A receiver for a digital data transmission system comprises a sampling device for sampling digital data signals received from a subscriber loop. A precursor equalizer connected to the output of the sampling device equalizes, in effect filters, the sampled digital data signal. A timing recovery circuit connected to the output of the precursor equalizer controls the sampling device in dependence upon the filtered digital data signal. The precursor equalizer has a difference equation such that the equalized digital data signal has at least one zero-crossing occurring substantially one baud before the main cursor of each pulse. For twisted wire pair subscriber loops, the precursor equalizer may have a different equation: ##EQU1## which produces a single precursor zero-crossing. Alternatively, the precursor equalizer may have a difference equation: ##EQU2## which produces two precursor zero crossings, y(n) being the input to the filter, w(n) its output, h.sub.0 the main cursor height before equalization and h.sub.-1 the precursor height before equalization. The latter precursor equalizer may be modified by multiplying each of the coefficients (h.sub.-1 /h.sub.0).sup.2 and h.sub.-1 /h.sub.0 by a factor ##EQU3## for more precise determination of the zero crossings. A (1-Z.sup.-1) filter may be provided ahead of the precursor equalizer.

    Abstract translation: 用于数字数据传输系统的接收机包括用于对从用户回路接收的数字数据信号进行采样的采样装置。 连接到采样装置的输出的前体均衡器实际上对采样的数字数据信号进行了滤波。 连接到前驱均衡器的输出的定时恢复电路根据滤波的数字数据信号控制采样装置。 前体均衡器具有差分方程，使得均衡数字数据信号在每个脉冲的主光标之前具有基本上一个波特率的至少一个过零点。 对于双绞线对用户环路，前体均衡器可以具有不同的等式：其产生单个前体零交叉。 或者，前体均衡器可以具有差分方程：其产生两个前体过零点，y（n）是滤波器的输入，w（n）其输出，h0是均衡前的主光标高度和h-1 均衡前的前体高度。 可以通过将系数（h-1 / h0）2和h-1 / h0中的每一个乘以因子“IMAGE”来修正后一前兆均衡器，以更准确地确定过零点。 可以在前体均衡器的前方设置（1-Z-1）滤波器。

    Teleconference terminal
    8.
    发明授权
    Teleconference terminal 失效
    电话会议终端

    公开(公告)号：US5512938A

    公开(公告)日：1996-04-30

    申请号：US413631

    申请日：1995-03-30

    Applicant: Kenzo Ohno

    Inventor： Kenzo Ohno

    IPC: G06F15/00 ,  H04M3/56 ,  H04M11/06 ,  H04N7/15 ,  H04Q11/04 ,  H04M11/00

    CPC classification number: H04N7/15 ,  H04M3/567 ,  H04Q11/0471 ,  G06F3/16 ,  H04M3/568 ,  H04Q2213/034 ,  H04Q2213/093 ,  H04Q2213/214 ,  H04Q2213/216 ,  H04Q2213/337 ,  H04Q2213/36 ,  H04Q2213/392

    Abstract: In the PC-based teleconference terminal 200 includes a PC 110 and a video codec unit 130, a network control unit 220 and an audio codec unit 240 which are all constructed on the same expansion board, with the video codec unit 130, the audio codec unit 240 and the network control unit 240 all connected to the computer bus 114 so as to be able to transfer audio data, video data, data and AV multiframes between themselves. The audio codec unit 240 is equipped with a audio clock generation unit 241 for generating an audio sampling signal of 8 kHz through self-excited oscillation. The CPU 111 in the PC 110 executes frame alignment by executing the AV multiplexer/separator software 212 stored in the memory 112 and executes the AV multiframe conversion and separation for H series recommendation on the CCITT, as well as adjusting any shortages or surpluses of reproduction audio data which arise due to synchronization slips between the audio sampling clock and the network clock by executing the synchronization slip control software 211.

    Abstract translation: 在基于PC的电话会议终端200中包括PC 110和视频编解码器单元130，网络控制单元220和音频编解码器单元240，它们全部构造在同一扩展板上，视频编解码器单元130，音频编解码器 单元240和网络控制单元240全部连接到计算机总线114，以便能够在它们之间传送音频数据，视频数据，数据和AV多帧。 音频编解码器单元240配备有用于通过自激振荡产生8kHz的音频采样信号的音频时钟生成单元241。 PC 110中的CPU 111通过执行存储在存储器112中的AV多路复用器/分离器软件212执行帧排列，并执行CCITT上的H系列推荐的AV多帧转换和分离，以及调整再现的任何短缺或剩余 由于通过执行同步滑动控制软件211在音频采样时钟和网络时钟之间的同步滑动而产生的音频数据。

    Device for synchronizing system clock using detected synchromization signal
    9.
    发明授权
    Device for synchronizing system clock using detected synchromization signal 失效
    使用检测到的同步信号同步系统时钟的装置

    公开(公告)号：US5432791A

    公开(公告)日：1995-07-11

    申请号：US185821

    申请日：1994-01-21

    Applicant: Ed Gancarcik

    Inventor： Ed Gancarcik

    IPC: H04J3/06 ,  H04L7/033 ,  H04Q11/04

    CPC classification number: H04J3/0685 ,  H04L7/033 ,  H04Q11/0471 ,  H04Q2213/214 ,  H04Q2213/36

    Abstract: A digital switching system comprises a plurality of digital interface cards for connection to a public telecommunications network, each card including at least one digital interface circuit with a synchronization detector for detecting a network synchronization signal. A control unit includes a system clock having a clock synchronization input. A a system bus carries data through the switching system and is connected between the interface cards and the control unit. A switch in the interface cards is operative in response to control data from the control unit and carried over the system bus in an overhead channel to connect the synchronization detector of a selected active digital interface circuit to the clock synchronization input of the system clock over a clock synchronization line so as to pass detected synchronization signals on the active circuit directly thereto. The system clock can thus be brought directly into synchronization with the detected synchronization signal of the active interface unit.

    Abstract translation: PCT No.PCT / CA92 / 00317 Sec。 371日期1994年1月21日 102（e）日期1994年1月21日PCT提交1992年7月22日PCT公布。 公开号WO93 / 82513 日期：1993年2月4日。数字切换系统包括用于连接到公共电信网络的多个数字接口卡，每个卡包括具有用于检测网络同步信号的同步检测器的至少一个数字接口电路。 控制单元包括具有时钟同步输入的系统时钟。 系统总线通过交换系统传送数据，并连接在接口卡和控制单元之间。 接口卡中的开关响应于来自控制单元的控制数据而工作，并在开销信道上通过系统总线承载，以将所选择的有源数字接口电路的同步检测器连接到系统时钟的时钟同步输入 时钟同步线，以便将检测到的同步信号直接传递到有源电路上。 因此，系统时钟可以直接与检测到的有源接口单元的同步信号同步。

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