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    Receiver with enhanced clock and data recovery
    4.
    发明授权
    Receiver with enhanced clock and data recovery 有权
    接收机具有增强的时钟和数据恢复功能

    公开(公告)号：US08929496B2

    公开(公告)日：2015-01-06

    申请号：US12812720

    申请日：2009-01-30

    申请人： Hae-Chang Lee ,  Brian Leibowitz ,  Jaeha Kim ,  Jafar Savoj

    发明人： Hae-Chang Lee ,  Brian Leibowitz ,  Jaeha Kim ,  Jafar Savoj

    IPC分类号： H04L7/00 ,  H04L7/033 ,  H04L25/06 ,  H04L25/03 ,  H04L27/00

    CPC分类号： H04L7/0016 ,  G06Q10/06312 ,  G06Q10/103 ,  H04L7/0004 ,  H04L7/0062 ,  H04L7/033 ,  H04L7/0331 ,  H04L7/0334 ,  H04L25/062 ,  H04L2025/0349 ,  H04L2027/004 ,  H04L2027/0067 ,  H04L2027/0069

    摘要： A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

    摘要翻译： 接收机设备利用基于边缘的时钟和数据恢复来实现增强的数据接收，例如使用闪存模数转换器架构。 在示例实施例中，设备实现第一相位调节控制回路，例如，一个爆炸相位检测器，其通过调整边沿时钟的相位来检测数据转换以便在边缘采样器的最优边缘时间调整采样 的采样器。 该循环可以通过调整诸如闪存ADC的数据采样器的数据时钟的相位来进一步调整接收数据间隔中的采样以实现最佳数据接收。 该装置还可以实现具有例如波特率相位检测器的第二相位调整控制回路，波形率相位检测器检测数据间隔以便在数据采样器的最佳数据时间进一步调整采样。

    OPTICAL RECEIVER AND RECEIVING METHOD
    6.
    发明申请
    OPTICAL RECEIVER AND RECEIVING METHOD 审中-公开
    光接收机和接收方式

    公开(公告)号：US20110150506A1

    公开(公告)日：2011-06-23

    申请号：US12958828

    申请日：2010-12-02

    申请人： Takahito TANIMURA ,  Tomoo Takahara ,  Takeshi Hoshida

    发明人： Takahito TANIMURA ,  Tomoo Takahara ,  Takeshi Hoshida

    IPC分类号： H04B10/06

    CPC分类号： H04B10/697 ,  H04L25/03019 ,  H04L27/0014 ,  H04L27/223 ,  H04L27/3818 ,  H04L2025/03535 ,  H04L2027/004 ,  H04L2027/0067

    摘要： An optical receiver includes an optical front-end, a digital converter, a frequency-characteristic-difference reducing unit and an identifying unit. The optical front-end splits an input signal light into signal light components on a basis of local light and converts the split signal light components into electrical signals. The digital converter converts the electrical signals, converted by the optical front end, into digital signals. The frequency-characteristic-difference reducing unit reduces a frequency-characteristic difference between the digital signals converted by the digital converter. The identifying unit identifies each of the digital signals whose frequency-characteristic difference is reduced by the frequency-characteristic-difference reducing unit.

    摘要翻译： 光接收器包括光学前端，数字转换器，频率特征差减小单元和识别单元。 光学前端在局部光的基础上将输入信号光分解为信号光分量，并将分离的信号光分量转换为电信号。 数字转换器将由光学前端转换的电信号转换为数字信号。 频率特性差减小单元降低由数字转换器转换的数字信号之间的频率特性差。 识别单元通过频率特性差减小单元识别频率特性差减小的每个数字信号。

    ELECTRONIC TUNER AND HIGH FREQUENCY RECEIVING DEVICE USING THE SAME
    7.
    发明申请
    ELECTRONIC TUNER AND HIGH FREQUENCY RECEIVING DEVICE USING THE SAME 失效
    电子调谐器和使用该电子调谐器的高频接收装置

    公开(公告)号：US20110122975A1

    公开(公告)日：2011-05-26

    申请号：US12808461

    申请日：2008-12-24

    申请人： Takashi Umeda ,  Hiroaki Ozeki ,  Akira Fujishima

    发明人： Takashi Umeda ,  Hiroaki Ozeki ,  Akira Fujishima

    IPC分类号： H04L25/06

    CPC分类号： H04B1/30 ,  H04L25/0224 ,  H04L25/067 ,  H04L27/2647 ,  H04L2027/004

    摘要： Demodulator includes reception quality evaluation circuit for evaluating the quality of a received signal by comparison with a first reference value, and outputting an evaluation signal; and driving circuit receiving the evaluation signal. If reception quality evaluation circuit evaluates that the quality of the received signal is acceptable, power supply from driving circuit to DC offset control loop is stopped. This offers a high-frequency receiver that reduces power consumption.

    摘要翻译： 解调器包括：接收质量评估电路，用于通过与第一参考值进行比较来评估接收信号的质量，并输出评估信号; 以及接收所述评估信号的驱动电路。 如果接收质量评估电路评估接收信号的质量是可接受的，则停止从驱动电路到DC偏移控制环路的电源。 这提供了一个降低功耗的高频接收器。

    Receiver With Enhanced Clock And Data Recovery
    8.
    发明申请
    Receiver With Enhanced Clock And Data Recovery 有权
    接收机具有增强的时钟和数据恢复功能

    公开(公告)号：US20100289544A1

    公开(公告)日：2010-11-18

    申请号：US12812720

    申请日：2009-01-30

    申请人： Hae-Chang Lee ,  Brian Leibowitz ,  Jaeha Kim ,  Jafar Savoj

    发明人： Hae-Chang Lee ,  Brian Leibowitz ,  Jaeha Kim ,  Jafar Savoj

    IPC分类号： H03L7/06

    CPC分类号： H04L7/0016 ,  G06Q10/06312 ,  G06Q10/103 ,  H04L7/0004 ,  H04L7/0062 ,  H04L7/033 ,  H04L7/0331 ,  H04L7/0334 ,  H04L25/062 ,  H04L2025/0349 ,  H04L2027/004 ,  H04L2027/0067 ,  H04L2027/0069

    摘要： A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

    摘要翻译： 接收机设备利用基于边缘的时钟和数据恢复来实现增强的数据接收，例如使用闪存模数转换器架构。 在示例实施例中，设备实现第一相位调节控制回路，例如，一个爆炸相位检测器，其通过调整边沿时钟的相位来检测数据转换以便在边缘采样器的最优边缘时间调整采样 的采样器。 该循环可以通过调整诸如闪存ADC的数据采样器的数据时钟的相位来进一步调整接收数据间隔中的采样以实现最佳数据接收。 该装置还可以实现具有例如波特率相位检测器的第二相位调整控制回路，波形率相位检测器检测数据间隔以便在数据采样器的最佳数据时间进一步调整采样。

    Circuit sharing for frequency and phase error correction
    9.
    发明授权
    Circuit sharing for frequency and phase error correction 有权
    频率和相位误差校正的电路共享

    公开(公告)号：US07167535B2

    公开(公告)日：2007-01-23

    申请号：US10327156

    申请日：2002-12-20

    申请人： Eric Sachse ,  Uwe Eckhardt ,  Ingo Kühn

    发明人： Eric Sachse ,  Uwe Eckhardt ,  Ingo Kühn

    IPC分类号： H03D3/24

    CPC分类号： H04L27/0014 ,  H04L27/227 ,  H04L2027/0034 ,  H04L2027/004 ,  H04L2027/0069

    摘要： A WLAN (Wireless Local Area Network) receiver with a synchronization unit is provided, wherein the synchronization unit comprises a frequency error correction unit configured to perform a frequency error correction process, a phase error correction unit configured to perform a phase error correction process, a filter circuit capable of applying one of at least two different filter transfer functions, wherein a first one of said at least two different filter transfer functions is a frequency error correction filter transfer function for use in said frequency error correction process and a second one of said at least two different filter transfer functions is a phase error correction filter transfer function for use in said phase error correction process, and a controller unit connected to said filter circuit to select one of said at least two different filter transfer functions.

    摘要翻译： 提供了具有同步单元的WLAN（Wireless Local Area Network，无线局域网））接收机，其中同步单元包括：频率误差校正单元，被配置为执行频率误差校正处理;相位误差校正单元，被配置为执行相位误差校正处理; 滤波器电路，其能够应用至少两个不同的滤波器传递函数中的一个，其中所述至少两个不同的滤波器传递函数中的第一个是用于所述频率误差校正处理的频率误差校正滤波器传递函数，并且所述第二个 至少两个不同的滤波器传递函数是用于所述相位误差校正处理的相位误差校正滤波器传递函数，以及连接到所述滤波器电路以选择所述至少两个不同滤波器传递函数之一的控制器单元。

    Adaptive equalizer capable of compensating for carrier frequency offset
    10.
    发明授权
    Adaptive equalizer capable of compensating for carrier frequency offset 失效
    能够补偿载波频偏的自适应均衡器

    公开(公告)号：US5499268A

    公开(公告)日：1996-03-12

    申请号：US404842

    申请日：1995-03-20

    申请人： Kyo Takahashi

    发明人： Kyo Takahashi

    IPC分类号： H04L25/03 ,  H04L27/00 ,  H04L27/233 ,  H03H7/30 ,  H03H7/40 ,  H03K5/159

    CPC分类号： H04L25/03019 ,  H04L27/2332 ,  H04L2027/003 ,  H04L2027/004 ,  H04L2027/0053 ,  H04L2027/0095

    摘要： An adaptive equalizer includes a multiplier for multiplying, by corrective data, an output signal from a filter unit for compensating for a signal distortion to which input digital data are subjected, a decision unit for estimating and outputting symbols of output data from the multiplier, a subtractor for subtracting an output signal of the decision unit from the output data from the multiplier, multipliers for inversely correcting the output signals from the decision unit and the subtractor which are corrected by the multiplier, a coefficient updating unit for updating the coefficients of the filter unit based on an output signal from the multiplier which inversely corrects the output signal from the subtractor, and a frequency offset estimating unit for estimating corrective data based on a frequency offset on the basis of the output signal from the multiplier which inversely corrects the output signal from the subtractor, and using the estimated corrective data as corrective data for the multiplier which multiplies the output signal from the filter unit by corrective data. An output signal from the multiplier which inversely corrects the output signal from the decision unit is fed back to a feedback filter of the filter unit.

    摘要翻译： 自适应均衡器包括：乘法器，用于通过校正数据乘以来自滤波器单元的输出信号，用于补偿输入数字数据经受的信号失真;判决单元，用于估计和输出来自乘法器的输出数据的符号; 用于从乘法器的输出数据中减去判定单元的输出信号的减法器，用于对来自判定单元的输出信号进行逆校正的乘法器和由乘法器校正的减法器;系数更新单元，用于更新滤波器的系数 基于来自乘法器的输出信号的单位，其对来自减法器的输出信号进行逆校正;以及频率偏移估计单元，用于基于来自乘法器的输出信号基于频率偏移来估计校正数据，该乘法器反相校正输出信号 并且使用估计的校正数据作为校正数据f 或者通过校正数据将来自滤波器单元的输出信号相乘的乘法器。 来自乘法器的反向校正来自判定单元的输出信号的输出信号被反馈到滤波器单元的反馈滤波器。