AMPLIFIER CIRCUIT AND ULTRASONIC PROBE
    2.
    发明申请

    公开(公告)号:US20170150945A1

    公开(公告)日:2017-06-01

    申请号:US15315696

    申请日:2014-06-06

    Applicant: HITACHI, LTD.

    Abstract: Amplification of a signal by a small circuit size and reduction of a power are achieved.A current controlling current source unit 53 changes an outputting current based on a transition time setting signal tp. A current controlling current source unit 54 changes a drawing current based on a transition time setting signal tn. An amplitude control unit 55 changes a power source voltage supplied to the current controlling current source unit 53 and changes amplitude of a voltage generated by a current outputted from the current controlling current source unit 53, based on amplitude setting signal ap. An amplitude control unit 56 changes a power source voltage supplied to the current controlling current source unit 54 and changes amplitude of a voltage generated by the current drawn by the current controlling current source unit 54, based on amplitude setting signal an. The buffer unit 57 drives a load in accordance with the current outputted from the current controlling current source unit 53 and the current drawn from the current controlling current source unit 54.

    PROGRAMMABLE SLEW RATE POWER SWITCH
    3.
    发明申请
    PROGRAMMABLE SLEW RATE POWER SWITCH 有权
    可编程单频率电源开关

    公开(公告)号:US20130229166A1

    公开(公告)日:2013-09-05

    申请号:US13409828

    申请日:2012-03-01

    CPC classification number: H03K5/04 H03K4/94 H03K17/167

    Abstract: An apparatus is configured to provide a voltage rising at the output with a programmable slew rate. The apparatus comprises a ramp-up control circuit module for supplying an increasing output voltage that is output to a load circuit. The ramp-up control circuit comprises an amplifier that receives the output of a plurality of selectable mirrored current sources that build up voltage across a capacitor for programming a selected linear slew rate for the increasing output voltage. The apparatus further comprises a glitch filter circuit for stabilizing the increasing output voltage so as to minimize glitches, including current and voltage stress, in the output voltage.

    Abstract translation: 一种装置被配置为以可编程转换速率在输出端提供电压上升。 该装置包括用于提供输出到负载电路的增加的输出电压的斜坡上升控制电路模块。 斜坡上升控制电路包括放大器,其接收多个可选择镜像电流源的输出,该电流在电容器之间建立电压,以便为增加的输出电压编程所选择的线性转换速率。 该装置还包括用于稳定增加的输出电压的毛刺滤波器电路,以便最小化输出电压中的电流和电压应力的毛刺。

    Methods and Devices for Generating Trapezoidal Fire Pulses
    4.
    发明申请
    Methods and Devices for Generating Trapezoidal Fire Pulses 有权
    用于产生梯形火焰脉冲的方法和装置

    公开(公告)号:US20110084739A1

    公开(公告)日:2011-04-14

    申请号:US12935508

    申请日:2009-03-31

    CPC classification number: H03K4/94

    Abstract: The present application discloses trapezoidal fire pulse generating methods and devices. According to the devices and methods of the present application, the voltage value of the positive DC control voltage signal, the voltage value of the negative DC control voltage signal, the voltage value of the rise-time DC control voltage signal and a fall-time DC control voltage signal can be determined according to the parameter values of a trapezoidal fire pulse required to be output. Thus, corresponding DC control voltage signals can be generated. Further, the positive DC control voltage signal and the negative DC control voltage signal can be modulated to a square-wave pulse. Then, the rise-time DC control voltage signal, the fall-time DC control voltage signal and the square-wave pulse can be input to a inverse integrator so as to generate a trapezoidal fire pulse. Since there are specific quantitative relations between the rise time and fall time of the trapezoidal fire pulse and the voltage values of the rise-time and fall-time DC control voltage signals, the corresponding rise time and fall time of the trapezoidal fire pulses can be accurately controlled and adjusted so that the output trapezoidal fire pulses can be more stable and accurate.

    Abstract translation: 本申请公开了梯形火焰脉冲发生方法和装置。 根据本申请的装置和方法,正直流控制电压信号的电压值,负直流控制电压信号的电压值,上升时间直流控制电压信号的电压值和下降时间 可以根据需要输出的梯形火焰脉冲的参数值来确定直流控制电压信号。 因此,可以产生相应的DC控制电压信号。 此外,正直流控制电压信号和负直流控制电压信号可以被调制成方波脉冲。 然后,可以将上升时间DC控制电压信号,下降时间DC控制电压信号和方波脉冲输入到反向积分器,以产生梯形起动脉冲。 由于梯形火焰脉冲的上升时间和下降时间与上升时间和下降时间直流控制电压信号的电压值之间存在特定的定量关系,所以梯形火焰脉冲的相应上升时间和下降时间可以是 精确控制和调整,使输出梯形火焰脉冲更加稳定准确。

    LIMIT SIGNAL GENERATOR, PWM CONTROL CIRCUIT, AND PWM CONTROL METHOD THEREOF
    5.
    发明申请
    LIMIT SIGNAL GENERATOR, PWM CONTROL CIRCUIT, AND PWM CONTROL METHOD THEREOF 审中-公开
    限制信号发生器,PWM控制电路及其PWM控制方法

    公开(公告)号:US20100052742A1

    公开(公告)日:2010-03-04

    申请号:US12200908

    申请日:2008-08-28

    CPC classification number: H03K17/0822 H03K4/94

    Abstract: A PWM control circuit is disclosed. An oscillator generates a triangular signal, received by a limit signal generator to produce a limit signal accordingly. Corresponding to a rising period of the triangular signal, the limit signal sequentially experiences a first holding period, a rising period and a second holding period, wherein the limit signal has a first predetermined value during the first holding period and a second predetermined value during the second holding period. A compare/control circuit compares the limit signal with a detection signal corresponding to a current through a power switch, and controls the power switch accordingly.

    Abstract translation: 公开了PWM控制电路。 振荡器产生由限制信号发生器接收的三角形信号,以产生相应的极限信号。 对应于三角形信号的上升期间,限制信号依次经历第一保持期间,上升期间和第二保持期间,其中限制信号在第一保持期间具有第一预定值,在第 第二期。 比较/控制电路将限制信号与对应于通过电源开关的电流的检测信号进行比较,并相应地控制电源开关。

    DRIVING CIRCUIT FOR CAPACITIVE LOAD AND LIQUID INJECTING APPARATUS
    6.
    发明申请
    DRIVING CIRCUIT FOR CAPACITIVE LOAD AND LIQUID INJECTING APPARATUS 有权
    用于电容负载和液体注入装置的驱动电路

    公开(公告)号:US20090206888A1

    公开(公告)日:2009-08-20

    申请号:US12370809

    申请日:2009-02-13

    Abstract: A driving circuit for a capacitive load includes a driving signal generating unit that generates a driving signal for driving the capacitive load by using a pair of driving transistors. A power source voltage generating unit generates high-voltage and low-voltage power source voltages that are higher and lower, respectively, than the voltage of the driving signal and applies the voltages to collectors of the driving transistors. The power source voltage generating unit includes a pair of power source transistors and a capacitor. The low-voltage power source voltage is generated in an output side of the power-source transistor pair as a voltage that is in a voltage region lower than that of the driving signal and follows the driving signal. The high-voltage power source voltage is output from a high-voltage terminal of the capacitor, is in a voltage region higher than that of the driving signal, and follows the driving signal.

    Abstract translation: 用于电容性负载的驱动电路包括驱动信号产生单元,其通过使用一对驱动晶体管产生用于驱动电容性负载的驱动信号。 电源电压产生单元产生分别比驱动信号的电压高和低的高电压和低压电源电压,并将电压施加到驱动晶体管的集电极。 电源电压产生单元包括一对电源晶体管和电容器。 在电源晶体管对的输出侧产生低电压电源电压,作为比驱动信号的电压低的电压,并且跟随驱动信号。 高压电源电压从电容器的高电压端子输出,处于比驱动信号高的电压区域,并跟随驱动信号。

    Trapezoid signal generating circuit

    公开(公告)号:US07154310B2

    公开(公告)日:2006-12-26

    申请号:US10808542

    申请日:2004-10-07

    Applicant: Akio Kojima

    Inventor: Akio Kojima

    CPC classification number: H03K4/94

    Abstract: A trapezoid signal generating circuit has a charging and discharging circuit for a capacitor to generate a trapezoid signal which has less change at its rising portion and falling portion. Current output circuits supply a charging current and a discharging current in accordance with a voltage outputted from a current control circuit, respectively. The current control circuit has a charging and discharging circuit similar to the charging and discharging circuit, and produces an output voltage. This voltage increases in accordance with a linear function for a period from a time point when an input signal changes its level to a time point when the voltage reaches a reference voltage, and decreases thereafter in accordance with a linear function. The current flowing into the capacitor also increases and decreases in accordance with the linear function, so that the terminal voltage of the capacitor increases and decreases in accordance with a quadratic function.

    Electric load drive apparatus
    8.
    发明申请
    Electric load drive apparatus 有权
    电力负载驱动装置

    公开(公告)号:US20020171455A1

    公开(公告)日:2002-11-21

    申请号:US10146741

    申请日:2002-05-16

    CPC classification number: H03K4/94 H03K17/04206 H03K17/166

    Abstract: A current control circuit controls a gate potential of a transistor to equalize a load current IL with a trapezoidal wave signal Sb. The trapezoidal wave signal Sb increases at a constant gradient when a drive command signal Sa turns into H level. Due to increase of load current IL, the transistor starts operating in a linear region and a gate voltage VGS abruptly increases. A saturation state detecting circuit turns a current saturation signal Sc into L level when the gate voltage VGS exceeds a reference voltage Vr. A trapezoidal wave generating circuit stops increase of trapezoidal wave signal Sb. When drive command signal Sa turns into L level, the trapezoidal wave signal Sb decreases at a constant gradient. The load current IL decreases according to reduction of trapezoidal wave signal Sb.

    Abstract translation: 电流控制电路控制晶体管的栅极电位以使负载电流IL与梯形波信号Sb相等。 当驱动指令信号Sa变为H电平时,梯形波信号Sb以恒定的梯度增加。 由于负载电流IL的增加,晶体管开始工作在线性区域,栅极电压VGS突然增加。 当栅极电压VGS超过参考电压Vr时,饱和状态检测电路使电流饱和信号Sc变为L电平。 梯形波发生电路阻止梯形波信号Sb的增加。 当驱动指令信号Sa变为L电平时,梯形波信号Sb以恒定的梯度减小。 负载电流IL根据梯形波信号Sb的减小而减小。

    Segmented waveform generator
    9.
    发明授权
    Segmented waveform generator 失效
    分段波形发生器

    公开(公告)号:US4962344A

    公开(公告)日:1990-10-09

    申请号:US356794

    申请日:1989-05-23

    Applicant: Mark W. Bohrer

    Inventor: Mark W. Bohrer

    CPC classification number: H03K4/94 H03K4/00 H03K4/50

    Abstract: A segmented waveform generator comprising a plurality of ramp generators whose outputs are coupled to and summed in a summing circuit to provide a waveform having a desired harmonic content or shape. The ramp generators are triggered by the rising and falling edges of trigger pulses to provide symmetrical segmented waveforms.

    Abstract translation: 一种分段波形发生器,包括多个斜坡发生器,其输出耦合到求和电路中并相加在求和电路中,以提供具有所需谐波含量或形状的波形。 斜坡发生器由触发脉冲的上升沿和下降沿触发,以提供对称的分段波形。

    Zero-delay ramp generator
    10.
    发明授权
    Zero-delay ramp generator 失效
    零延迟斜坡发生器

    公开(公告)号:US4520276A

    公开(公告)日:1985-05-28

    申请号:US418901

    申请日:1982-09-16

    Applicant: Jay S. Baker

    Inventor: Jay S. Baker

    CPC classification number: H03K4/94 H03K4/066

    Abstract: An error amplifier receives an on/off signal and supplies an error signal to an integrator. The latter provides a ramp output, which is fed back to the error amplifier whereby the error signal therefrom further is dependent upon the ramp output. The error signal is selectively clamped positively and negatively whereby the resulting ramp output has a constant ramp time, with no ramp on/off delay.

    Abstract translation: 误差放大器接收开/关信号并向积分器提供误差信号。 后者提供斜坡输出,其被反馈到误差放大器,由此误差信号进一步取决于斜坡输出。 误差信号被选择性地钳位正负,从而得到的斜坡输出具有恒定的斜坡时间,没有斜坡开/关延迟。

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