公开(公告)号：US20240106405A1

公开(公告)日：2024-03-28

申请号：US18519421

申请日：2023-11-27

Applicant: WJLP COMPANY INC.

Inventor： Weyman John Lundquist ,  Mary Elizabeth Clark

IPC: H03H1/00

CPC classification number: H03H1/00 ,  H03H2001/0014 ,  H03H2001/0042 ,  H03H2001/005 ,  H03H2001/0092

Abstract: An inductive-capacitive filter includes a first insulating-conductive strip wound around a winding axis, where the first insulating-conductive strip includes a first conductive strip joined with a first insulating strip. An inductive-capacitive filter assembly includes a first and a second insulating-conductive strip concentrically wound around a winding axis, the first insulating-conductive strip including a first conductive strip joined with a first insulating strip, and the second insulating-conductive strip including a second conductive strip joined with a second insulating strip.

公开(公告)号：US20240007134A1

公开(公告)日：2024-01-04

申请号：US18346649

申请日：2023-07-03

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Zhi SHEN ,  Li CHEN ,  William J. DOMINO ,  Stephane Richard Marie WLOCZYSIAK ,  Xiao ZHANG

IPC: H04B1/00 ,  H04B1/18 ,  H04B1/40 ,  H03H1/00 ,  H03H3/08 ,  H04W72/23 ,  H03H7/46

CPC classification number: H04B1/006 ,  H04B1/0078 ,  H04B1/18 ,  H04B1/40 ,  H03H1/0007 ,  H03H3/08 ,  H04W72/23 ,  H03H7/46 ,  H03H2001/0014 ,  H03H2001/0092

Abstract: A combiner circuit can be implemented as a coupling circuit having a common node and configured to couple the common node to one of first and second groups of filters through a first path and to couple the common node to the other group through a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the one of the first and second groups for a signal in each band of the other group results in the signal being sufficiently excluded from the first path.

公开(公告)号：US11831290B2

公开(公告)日：2023-11-28

申请号：US17532987

申请日：2021-11-22

Applicant: WJLP COMPANY INC.

Inventor： Weyman John Lundquist ,  Mary Elizabeth Clark

IPC: H03H1/00

CPC classification number: H03H1/00 ,  H03H2001/005 ,  H03H2001/0014 ,  H03H2001/0042 ,  H03H2001/0092

Abstract: An inductive-capacitive filter includes a first insulating-conductive strip wound around a winding axis, where the first insulating-conductive strip includes a first conductive strip joined with a first insulating strip. An inductive-capacitive filter assembly includes a first and a second insulating-conductive strip concentrically wound around a winding axis, the first insulating-conductive strip including a first conductive strip joined with a first insulating strip, and the second insulating-conductive strip including a second conductive strip joined with a second insulating strip.

公开(公告)号：US11695436B2

公开(公告)日：2023-07-04

申请号：US17222826

申请日：2021-04-05

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Zhi Shen ,  Li Chen ,  William J. Domino ,  Stephane Richard Marie Wloczysiak ,  Xiao Zhang

IPC: H04B1/00 ,  H03H3/08 ,  H03H7/46 ,  H04B1/18 ,  H04B1/40 ,  H03H1/00 ,  H04W72/23

CPC classification number: H04B1/006 ,  H03H1/0007 ,  H03H3/08 ,  H03H7/46 ,  H04B1/0078 ,  H04B1/18 ,  H04B1/40 ,  H04W72/23 ,  H03H2001/0014 ,  H03H2001/0092

Abstract: A half-bride combiner can be implemented as a coupling circuit having a common node and configured to couple the common node to one of first and second groups of filters through a first path and to couple the common node to the other group through a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the one of the first and second groups for a signal in each band of the other group results in the signal being sufficiently excluded from the first path.

公开(公告)号：US20190109575A1

公开(公告)日：2019-04-11

申请号：US15730643

申请日：2017-10-11

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.

Inventor： Milad DARVISHI ,  Hooman DARABI ,  Arya Reza BEHZAD

IPC: H03H7/01 ,  H03H2/00 ,  H03H7/12 ,  H04J1/04

CPC classification number: H03H7/01 ,  H03H2/008 ,  H03H7/12 ,  H03H19/002 ,  H03H2001/0014 ,  H03H2007/013 ,  H03H2210/025 ,  H04J1/045

Abstract: A linear, low noise, high quality factor (Q) and widely tunable notch filter circuit includes one or more first reactive elements coupled between a first filter node and a first node. The notch filter circuit further includes a multi-branch circuit having multiple parallel branches and coupled between the first node and a second node. Each branch of the multi-branch circuit includes at least a switch coupled to a variable capacitor. A notch frequency of the notch filter circuit is tunable by adjusting a capacitance of the variable capacitor.

公开(公告)号：US20180083588A1

公开(公告)日：2018-03-22

申请号：US15350969

申请日：2016-11-14

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie YUN ,  Shiqun GU ,  Je-Hsiung Jeffrey LAN ,  Jonghae KIM ,  Niranjan Sunil MUDAKATTE ,  David Francis BERDY ,  Mario Francisco VELEZ ,  Chengjie ZUO

IPC: H03H1/00 ,  H01G4/12 ,  H01G4/005 ,  H01G4/40 ,  H03H7/46

CPC classification number: H03H1/00 ,  H01G4/005 ,  H01G4/012 ,  H01G4/1209 ,  H01G4/33 ,  H01G4/40 ,  H01L23/5223 ,  H01L28/60 ,  H03H7/46 ,  H03H7/463 ,  H03H2001/0014 ,  H03H2001/0021 ,  H04B1/0057 ,  H04B1/0458 ,  H04B1/18

Abstract: A capacitor may include a first capacitor plate having a first length. The capacitor may also include an inorganic capacitor dielectric layer on sidewalls and a surface of the first capacitor plate and a second capacitor plate on the inorganic capacitor dielectric layer. The second capacitor plate may have a second length less than the first length of the first capacitor plate. The capacitor may also include a conductive contact landing directly on the first capacitor plate. The conductive contact may land directly on the first capacitor plate by extending through the inorganic capacitor dielectric layer and an organic interlayer dielectric supported by the inorganic capacitor dielectric layer.

公开(公告)号：US09876480B2

公开(公告)日：2018-01-23

申请号：US14060341

申请日：2013-10-22

Applicant: Infineon Technologies AG

Inventor： Winfried Bakalski

IPC: H03H7/01 ,  H03H11/04 ,  H03J7/10 ,  H03J3/20 ,  H03H1/00

CPC classification number: H03H7/0153 ,  H03H11/04 ,  H03H2001/0014 ,  H03J3/20 ,  H03J7/10 ,  H03J2200/10

Abstract: A tunable capacitance circuit comprises a plurality of varactor transistors which are coupled in series. An antenna tuner comprises such a tunable capacitance circuit.

公开(公告)号：US09461609B2

公开(公告)日：2016-10-04

申请号：US14705386

申请日：2015-05-06

Applicant: TDK Corporation

Inventor： Anuj Madan ,  Dev V. Gupta ,  Zhiguo Lai

IPC: H03H7/01 ,  H03H11/04 ,  H03H11/28 ,  H01L27/08 ,  H03H1/00

CPC classification number: H03H7/06 ,  H01G7/00 ,  H01L27/0805 ,  H03H1/02 ,  H03H5/12 ,  H03H7/0138 ,  H03H7/0153 ,  H03H7/0161 ,  H03H7/17 ,  H03H11/04 ,  H03H11/28 ,  H03H2001/0014 ,  H03H2001/0064

Abstract: Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Abstract translation: 本文提供了高压可变电容器的装置和方法。 在某些配置中，集成电路（IC）包括可变电容器阵列和偏置可变电容器阵列以控制阵列的电容的偏置电压产生电路。 可变电容器阵列包括在射频（RF）输入和IC的RF输出之间并联电连接的多个可变电容器单元。 此外，每个可变电容器单元可以包括在RF输入和RF输出之间的两对或更多对抗串联金属氧化物半导体（MOS）电容器的级联。 反对串联MOS电容器对包括以反串联方式电连接的第一MOS电容器和第二MOS电容器。 偏置电压产生电路产生用于偏置可变电容器单元的MOS电容器的偏置电压。

公开(公告)号：US20160172310A1

公开(公告)日：2016-06-16

申请号：US14956655

申请日：2015-12-02

Applicant: Grenotek Integrated, Inc.

Inventor： Jerry Zhijun Zhai

IPC: H01L23/552 ,  H01L21/56 ,  H01L49/02

CPC classification number: H01L23/552 ,  H01F17/04 ,  H01L23/642 ,  H01L23/645 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L28/10 ,  H01L28/40 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83851 ,  H01L2224/92244 ,  H01L2924/0002 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/3025 ,  H03H7/075 ,  H03H7/09 ,  H03H2001/0014 ,  H03H2001/0085 ,  H03H2001/0092 ,  H01L2924/00

Abstract: Semiconductor chip laminates and inductive, capacitive, and electromagnetic shielding laminate structures that can be integrated together to form electronic circuits for use in systems and devices such as smartphones, tablet computers, notebook computers, wearable electronic devices, portable medical devices, servers, networking equipment, industrial equipment, etc. Fabrications of such integrated laminate structures can be modularized into four (4) types of laminates, namely, inductive laminates, capacitive laminates, electromagnetic shielding laminates, and semiconductor chip laminates, which can be vertically laminated together and/or integrated side-by-side with high density to produce the desired electronic circuits, systems, and devices.

Abstract translation: 半导体芯片层压板和电感式，电容式和电磁屏蔽层压结构，其可以集成在一起以形成用于诸如智能手机，平板计算机，笔记本电脑，可穿戴电子设备，便携式医疗设备，服务器，网络设备 ，工业设备等。这种集成的层压结构的制造可以被模块化为四（4）种层压体，即感应层压板，电容层压板，电磁屏蔽层压板和半导体芯片层压板，其可以垂直层压在一起和/或 以高密度并排集成，以产生所需的电子电路，系统和设备。

公开(公告)号：US20160163697A1

公开(公告)日：2016-06-09

申请号：US14705429

申请日：2015-05-06

Applicant: NEWLANS, INC.

Inventor： Anuj Madan ,  Dev V. Gupta ,  Zhiguo Lai

IPC: H03H7/01

CPC classification number: H03H7/06 ,  H01G7/00 ,  H01L27/0805 ,  H03H1/02 ,  H03H5/12 ,  H03H7/0138 ,  H03H7/0153 ,  H03H7/0161 ,  H03H7/17 ,  H03H11/04 ,  H03H11/28 ,  H03H2001/0014 ,  H03H2001/0064

Abstract: Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Abstract translation: 本文提供了高压可变电容器的装置和方法。 在某些配置中，集成电路（IC）包括可变电容器阵列和偏置可变电容器阵列以控制阵列的电容的偏置电压产生电路。 可变电容器阵列包括在射频（RF）输入和IC的RF输出之间并联电连接的多个可变电容器单元。 此外，每个可变电容器单元可以包括在RF输入和RF输出之间的两对或更多对抗串联金属氧化物半导体（MOS）电容器的级联。 反对串联MOS电容器对包括以反串联方式电连接的第一MOS电容器和第二MOS电容器。 偏置电压产生电路产生用于偏置可变电容器单元的MOS电容器的偏置电压。