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公开(公告)号：US3829797A
公开(公告)日：1974-08-13
申请号：US38149073
申请日：1973-07-23
发明人： KARKAR E , KOVALEVSKI N
CPC分类号： H03C1/36 , H03C1/547 , H03C2200/0066
摘要： An amplitude modulator using an FET, or MOSFET and a coupling and phase splitting device capable of accepting both single ended and balanced inputs (like for example, a differential amplifier or a center tapped choke coil, or a transformer). The source and drain terminals are connected to the differential inputs (outputs) of the device, and the signal to the single ended input of the device. The carrier is applied to the gate terminal of the FET or MOSFET. The switching action of the device is equally efficient for both single ended and differential inputs (outputs). However, the carrier leak voltage is being applied simultaneously to both terminals of the differential input and thus suppressed in the output by virtue of high suppression of longitudinal (common) mode pertinent to devices with differential inputs (outputs). Other modulators are disclosed including a double balanced modulator using two complimentary field effect transistors and a double balanced modulator using two field effect transistors of the same conductivity type.
摘要翻译： 使用FET或MOSFET的振幅调制器和能够接受单端和平衡输入（例如，差分放大器或中心抽头扼流线圈或变压器）的耦合和相位分离装置。 源极和漏极端子连接到器件的差分输入（输出），并将信号连接到器件的单端输入。 载波被施加到FET或MOSFET的栅极端子。 器件的开关动作对于单端和差分输入（输出）同样有效。 然而，载波泄漏电压同时施加到差分输入的两个端子，并因此通过与差分输入（输出）的器件相关的纵向（公共）模式的高抑制而在输出中被抑制。 公开了包括使用两个互补场效应晶体管的双平衡调制器和使用相同导电类型的两个场效应晶体管的双平衡调制器的其它调制器。
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公开(公告)号：US4547752A
公开(公告)日：1985-10-15
申请号：US480005
申请日：1983-03-29
申请人： Seitaro Shinbara
发明人： Seitaro Shinbara
CPC分类号： H03C1/545 , H03C2200/0012 , H03C2200/0066 , H03C2200/0079
摘要： An amplitude modulator is disclosed which has first and second differential pairs of transistors whose bases are supplied with a carrier signal, and a third differential pair of transistors whose collectors are respectively connected to the common emitters of the first and second differential pairs of transistors and of which one transistor is supplied at a base with a modulating signal. The emitters of the first differential pair of transistors are connected together through corresponding resistors. The collectors of two transistors which are included in the first and second differential pair of transistors and of which the bases are connected together and further connected to a load resistor.
摘要翻译： 公开了一种幅度调制器，其具有第一和第二差分对的晶体管，其基极被提供有载波信号，以及第三差分对晶体管，其集电极分别连接到第一和第二差分晶体管对的共同发射极， 一个晶体管在基极处被提供一个调制信号。 第一差分对晶体管的发射极通过相应的电阻器连接在一起。 包括在第一和第二差分对晶体管中并且其基极连接在一起并进一步连接到负载电阻器的两个晶体管的集电极。
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公开(公告)号：US4142162A
公开(公告)日：1979-02-27
申请号：US866583
申请日：1978-01-03
IPC分类号： H03C1/54
CPC分类号： H03C1/545 , H03C2200/0012 , H03C2200/0066
摘要： A double sideband suppressed carrier (DSBSC) modulator for operation from unbalanced carrier frequency and modulation frequency sources has the input terminals of first and second constant current amplifiers connected to receive the modulation frequency output signal from the unbalanced source. The first and second constant current amplifiers provide in-phase and out-of-phase modulation frequency signals at respective high impedance output terminals for connection to a modulator. The modulator comprises a quad, i.e., four transistors connected to provide a pair of differential amplifiers. Transistors 1 and 2 comprising the first of the pair and transistors 3 and 4 comprising the second of the differential pair. The emitters of each differential amplifier are tied together. The emitter junction of the first differential amplifier is connected to the high impedance output of the first constant current amplifier, and the emitter junction of the second differential amplifier is connected to the high impedance output of the second constant current amplifier. The base of transistors 2 and 3 are connected together and then connected to one terminal of the carrier frequency source. The bases of transistors 1 and 4 are connected together and then connected to the other terminal of the carrier frequency source. The collectors of transistors 1 and 3 are tied together and the collectors of transistors 2 and 4 are tied together to provide the modulated signal output paths.
摘要翻译： 用于从不平衡载波频率和调制频率源操作的双边带抑制载波（DSBSC）调制器具有连接的第一和第二恒定电流放大器的输入端子以接收来自不平衡源的调制频率输出信号。 第一和第二恒流放大器在相应的高阻抗输出端子处提供同相和异相调制频率信号，用于连接到调制器。 调制器包括一个四通道，即四个晶体管，连接以提供一对差分放大器。 晶体管1和2包括第一对晶体管和晶体管3和4，其包括第二差分对。 每个差分放大器的发射极被连接在一起。 第一差分放大器的发射极结连接到第一恒流放大器的高阻抗输出，第二差分放大器的发射极结连接到第二恒流放大器的高阻抗输出。 晶体管2和3的基极连接在一起，然后连接到载波频率源的一个端子。 晶体管1和4的基极连接在一起，然后连接到载波频率源的另一个端子。 晶体管1和3的集电极被连接在一起，并且晶体管2和4的集电极被连接在一起以提供调制的信号输出路径。
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公开(公告)号：US6114921A
公开(公告)日：2000-09-05
申请号：US133903
申请日：1998-08-13
申请人： Kazuharu Aoki
发明人： Kazuharu Aoki
CPC分类号： H03C1/545 , H03C2200/0058 , H03C2200/0066 , H03D2200/0043
摘要： A double-balanced modulator in which the bias voltages do not become different by a buffer amplifier or the like connected to the front stage and a carrier wave is not leaked is provided. This modulator comprises a pair of input terminals 2, 3, a pair of preamplifiers 4 for amplifying balance signals supplied to the input terminals 2 and 3, and a double-balanced differential amplifier 23 to which balance carrier signals are supplied and which further amplifies the balance signals that have been amplified by the pair of preamplifiers 4, wherein capacitors 12 are connected in series between the base of a first transistor 7 and one of the input terminals 2, 3 and between the base of a second transistor 8 and the other one of the input terminals 2, 3, respectively.
摘要翻译： 提供了一种双平衡调制器，其中通过连接到前级的缓冲放大器等不使偏置电压变得不同，并且提供载波不泄漏的双平衡调制器。 该调制器包括一对输入端子2,3，用于放大提供给输入端子2和3的平衡信号的一对前置放大器4，以及双平衡差分放大器23，平衡载波信号被提供给双平衡差分放大器23，并进一步放大 由一对前置放大器4放大的平衡信号，其中电容器12串联连接在第一晶体管7的基极和输入端子2,3中的一个之间以及第二晶体管8的基极之间，另一个 的输入端子2,3。
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公开(公告)号：US5574755A
公开(公告)日：1996-11-12
申请号：US186398
申请日：1994-01-25
申请人： Charles J. Persico
发明人： Charles J. Persico
CPC分类号： H03C1/545 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03C2200/0025 , H03C2200/0058 , H03C2200/0066 , H03D1/229 , H03D7/18
摘要： An I/Q quadraphase modulator circuit for correcting phase errors of, typically, LO input quadrature signals. The circuit uses a pair of Gilbert cell multipliers, to the bottom ports of which are applied I and Q signals, and to the top ports of which are applied sum and difference, limited, quadrature, differential signals. The result is to make the circuit less sensitive to LO phase errors and thus to improve sideband (image) rejection over the conventional circuit typically using one Gilbert cell multiplier.
摘要翻译： 用于校正通常为LO输入正交信号的相位误差的I / Q四帧调制器电路。 该电路使用一对吉尔伯特单元乘法器，其底部端口应用I和Q信号，并且其顶端端口应用和差和有限，正交，差分信号。 结果是使得电路对LO相位误差不那么敏感，并且因此通常使用一个吉尔伯特单元乘法器来改善常规电路的边带（图像）抑制。
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公开(公告)号：US20180205402A1
公开(公告)日：2018-07-19
申请号：US15631922
申请日：2017-06-23
发明人： Yan Li , Wendy Yu , Kamesh Medapalli , Hongwei Kong , Patrick Cruise
CPC分类号： H04B1/10 , H03C3/00 , H03C2200/0066 , H03D1/04 , H03D3/002 , H03D2200/0086 , H04B1/16 , H04L27/14
摘要： A modem includes a modulator and a demodulator. The demodulator includes a direct current removing (DCR) circuit to transition between an acquisition mode, where the DCR circuit operates with a first loop gain; and a tracking mode, where the DCR circuit operates with a second loop gain. The second loop gain is smaller than the first loop gain, and the timing of the transition between the acquisition mode and tracking mode is programmable.
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公开(公告)号：US4338580A
公开(公告)日：1982-07-06
申请号：US148349
申请日：1980-05-09
申请人： Michael J. Gay
发明人： Michael J. Gay
CPC分类号： H03C1/545 , H03C2200/0012 , H03C2200/0066
摘要： A modulator receiving an analog input signal and a switching signal for providing an amplitude modulated output signal. The modulator includes a differential input amplifier coupled to a multiplier wherein the analog input signal is commutated through a load resistor by the switching signals that are supplied to the multiplier. A gating circuit is coupled to the multiplier whereby the analog input signal is commutated to a feedback circuit coupled between the gating circuit and the second input of the differential input amplifier. The feedback circuit produces an output for adjusting the bias potential at the second input of the differential input amplifier to equalize the differential output currents therefrom when the analog input signal is set to a nominal zero level and the gating circuit is activated.
摘要翻译： 接收模拟输入信号的调制器和用于提供调幅输出信号的开关信号。 调制器包括耦合到乘法器的差分输入放大器，其中通过提供给乘法器的开关信号，模拟输入信号通过负载电阻器换向。 门控电路耦合到乘法器，由此模拟输入信号被转换到耦合在门控电路和差分输入放大器的第二输入端之间的反馈电路。 反馈电路产生一个输出，用于调整差分输入放大器的第二输入处的偏置电位，以在模拟输入信号被设置为标称零电平并且门控电路被激活时使来自其的差分输出电流相等。
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8.发明授权High frequency modulator, such as an amplitude modulator, including a frequency multiplier 失效高频调制器，例如幅度调制器，包括倍频器
公开(公告)号：US3974460A
公开(公告)日：1976-08-10
申请号：US576737
申请日：1975-05-12
申请人： Masayuki Hongu , Tsutomu Niimura
发明人： Masayuki Hongu , Tsutomu Niimura
CPC分类号： H04N5/40 , H03C1/36 , H03C1/545 , H03B19/14 , H03B5/36 , H03C2200/0012 , H03C2200/0066
摘要： A high-frequency modulator circuit including a frequency multiplier comprised of a first differential amplifier for receiving a base oscillating signal and for multiplying the frequency of the base oscillating signal to thereby produce a higher frequency carrier signal; and a modulating circuit connected to the first differential amplifier for modulating the carrier signal with input information. The first differential amplifier includes a pair of output terminals; and the modulating circuit is comprised of a second and third differential amplifier, each having a pair of input terminals connected to the respective output terminals of the first differential amplifier such that the higher frequency carrier signal is applied differentially to each of the second and third differential amplifiers. The second and third differential amplifiers each includes a pair of output terminals, the second differential amplifier output terminals being connected to oppositely phased ones of the third differential amplifier output terminal. The input information is supplied to at least one of the second and third differential amplifiers to thereby vary the higher frequency carrier currents which flow therethrough.
摘要翻译： 一种高频调制器电路，包括：频率乘法器，包括用于接收基本振荡信号的第一差分放大器，并且用于乘以基本振荡信号的频率，从而产生较高频率的载波信号; 以及连接到第一差分放大器的调制电路，用于利用输入信息调制载波信号。 第一差分放大器包括一对输出端子; 并且调制电路包括第二和第三差分放大器，每个差分放大器具有连接到第一差分放大器的相应输出端的一对输入端，使得较高频率载波信号被差分地施加到第二和第三差分 放大器 第二和第三差分放大器各自包括一对输出端子，第二差分放大器输出端子连接到第三差分放大器输出端子的相对相位的输出端子。 输入信息被提供给第二和第三差分放大器中的至少一个，从而改变流过其中的较高频率载波电流。
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