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    Technique for suppression of edge current in semiconductor devices
    3.
    发明申请
    Technique for suppression of edge current in semiconductor devices 失效
    半导体器件边缘电流抑制技术

    公开(公告)号：US20010034105A1

    公开(公告)日：2001-10-25

    申请号：US09839874

    申请日：2001-04-20

    发明人： Lars S. Carlson

    IPC分类号： H01L021/20

    CPC分类号： H01L27/1463 ,  H01L27/14601 ,  H01L27/1464 ,  H01L27/14683 ,  H01L27/14698 ,  H01L29/0619 ,  H01L31/1121 ,  H01L31/186 ,  Y02P70/521

    摘要： A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.

    摘要翻译： 被动机构抑制在半导体管芯的边缘处产生的物理中断区域中产生的少数载流子电流注入到插入在光电二极管阵列芯片的边缘与外部光电二极管像素之间或外部像素本身中的任何有源保护区域中 通过切割，锯切或以其它方式将芯片与其上制造模具的晶片的其余部分分离。 薄金属层覆盖边缘区域的全部或部分，从而形成肖特基势垒。 该势垒在相邻的半导体材料中产生耗尽区。 耗尽区固有地产生能带分布，其优先地加速向金属产生或接近金属 - 半导体界面的少数载流子，从而通过保护结构的任何有源区域或光电二极管像素来抑制这些载流子的收集。

    Technique for suppression of edge current in semiconductor devices
    4.
    发明授权
    Technique for suppression of edge current in semiconductor devices 失效
    半导体器件边缘电流抑制技术

    公开(公告)号：US07217953B2

    公开(公告)日：2007-05-15

    申请号：US10953508

    申请日：2004-09-28

    申请人： Lars S. Carlson

    发明人： Lars S. Carlson

    IPC分类号： H01L29/00 ,  H01L31/00

    CPC分类号： H01L27/1463 ,  H01L27/14601 ,  H01L27/1464 ,  H01L27/14683 ,  H01L27/14698 ,  H01L29/0619 ,  H01L31/1121 ,  H01L31/186 ,  Y02P70/521

    摘要： A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.

    摘要翻译： 被动机构抑制在半导体管芯的边缘处产生的物理中断区域中产生的少数载流子电流注入到插入在光电二极管阵列芯片的边缘与外部光电二极管像素之间或外部像素本身中的任何有源保护区域中 通过切割，锯切或以其它方式将芯片与其上制造模具的晶片的其余部分分离。 薄金属层覆盖边缘区域的全部或部分，从而形成肖特基势垒。 该势垒在相邻的半导体材料中产生耗尽区。 耗尽区固有地产生能带分布，其优先地加速向金属产生或接近金属 - 半导体界面的少数载流子，从而通过保护结构的任何有源区域或光电二极管像素来抑制这些载流子的收集。

    Schottky barrier infrared detector array with increased effective fill factor
    5.
    发明授权
    Schottky barrier infrared detector array with increased effective fill factor 失效
    肖特基势垒红外探测器阵列具有增加的有效填充因子

    公开(公告)号：US5796155A

    公开(公告)日：1998-08-18

    申请号：US903392

    申请日：1997-06-25

    申请人： Freeman D. Shepherd ,  Jonathan M. Mooney

    发明人： Freeman D. Shepherd ,  Jonathan M. Mooney

    IPC分类号： H01L27/146 ,  H01L31/112 ,  H01L31/07 ,  H01L31/108

    CPC分类号： H01L31/1121 ,  H01L27/14649

    摘要： An improvement of the design of Schottky barrier infrared detector (SBIR) arrays, as taught by Roosild, et al. We describe modifications of the detector unit cell design which maximize the fraction of detector electrode area exhibiting full spectral emission response. In particular we recommend changes in the impurity density profile, or "doping", under the Schottky electrode. The new detector cell design can result in a two-fold increase in the photoemission of SBIR arrays, which have small detector cell dimensions.

    摘要翻译： 由Roosild等人教导的肖特基势垒红外探测器（SBIR）阵列设计的改进。 我们描述检测器单元设计的修改，其使得检测器电极区域的分数最大化，表现出全光谱发射响应。 特别地，我们建议在肖特基电极下的杂质浓度分布或“掺杂”的变化。 新的检测器单元设计可以导致具有小的检测器单元尺寸的SBIR阵列的光电子发射的两倍增加。

    Sensors and electronic devices
    6.
    发明授权
    Sensors and electronic devices 有权

    公开(公告)号：US11855236B2

    公开(公告)日：2023-12-26

    申请号：US18151770

    申请日：2023-01-09

    申请人： Samsung Electronics Co., Ltd.

    发明人： Kyung Bae Park ,  Sung Jun Park ,  Feifei Fang ,  Sung Young Yun ,  Seon-Jeong Lim ,  Chul Joon Heo

    IPC分类号： H01L31/112 ,  H01L31/0224 ,  H01L31/0256

    CPC分类号： H01L31/1121 ,  H01L31/0256 ,  H01L31/022408

    摘要： A sensor includes a first electrode and a second electrode, and a photo-active layer between the first electrode and the second electrode. The photo-active layer includes a light absorbing semiconductor configured to form a Schottky junction with the first electrode. The photo-active layer has a charge carrier trapping site configured to capture photo-generated charge carriers generated based on the light absorbing semiconductor absorbing incident light that enters at least the photo-active layer at a position adjacent to the first electrode. The sensor is configured to have an external quantum efficiency (EQE) that is adjusted based on a voltage bias being applied between the first electrode and the second electrode.

    Light quantity detection circuit and display panel using the same
    7.
    发明申请
    Light quantity detection circuit and display panel using the same 审中-公开
    光量检测电路和显示面板使用相同

    公开(公告)号：US20050258341A1

    公开(公告)日：2005-11-24

    申请号：US11133464

    申请日：2005-05-20

    申请人： Ryuji Nishikawa ,  Takashi Ogawa

    发明人： Ryuji Nishikawa ,  Takashi Ogawa

    IPC分类号： G01J1/44 ,  G01J1/46 ,  G02F1/133 ,  H01J40/14 ,  H01L31/112

    CPC分类号： G01J1/46 ,  G01J1/44 ,  G02F1/13318 ,  G09G2360/14 ,  H01L31/1121

    摘要： Since a photosensor using a diode is incapable of perform refresh because of the structure, and the leak characteristics are unstable, the diode is not suitable for the photosensor. On the other hand, in a photosensor using a thin film transistor, since light quantity is very small, there has been a problem that feedback is difficult. A detection circuit converting an output current into a voltage is added to a photosensor using a thin film transistor. Thus, it is possible to convert a very small current into a voltage in a desired range enabling feedback. In addition, by varying resistors, capacitors, and the number of TFTs connected in the photosensor included in the circuit, it is made possible to change the sensitivity of the photosensor.

    摘要翻译： 由于使用二极管的光电传感器由于结构不能进行刷新，并且泄漏特性不稳定，所以二极管不适用于光电传感器。 另一方面，在使用薄膜晶体管的光电传感器中，由于光量非常小，所以存在反馈困难的问题。 使用薄膜晶体管将输出电流转换为电压的检测电路加到光传感器上。 因此，可以将非常小的电流转换成能够进行反馈的期望范围内的电压。 此外，通过改变电阻器，电容器以及连接在包括在电路中的光电传感器中的TFT的数量，可以改变光电传感器的灵敏度。

    Technique for suppression of edge current in semiconductor devices
    8.
    发明申请
    Technique for suppression of edge current in semiconductor devices 失效
    半导体器件边缘电流抑制技术

    公开(公告)号：US20020185654A1

    公开(公告)日：2002-12-12

    申请号：US10214791

    申请日：2002-08-07

    申请人： Digirad Corporation, a Delaware corporation

    发明人： Lars S. Carlson

    IPC分类号： H01L029/74

    CPC分类号： H01L27/1463 ,  H01L27/14601 ,  H01L27/1464 ,  H01L27/14683 ,  H01L27/14698 ,  H01L29/0619 ,  H01L31/1121 ,  H01L31/186 ,  Y02P70/521

    摘要： A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.

    摘要翻译： 被动机构抑制在半导体管芯的边缘处产生的物理中断区域中产生的少数载流子电流注入到插入在光电二极管阵列芯片的边缘与外部光电二极管像素之间或外部像素本身中的任何有源保护区域中 通过切割，锯切或以其它方式将芯片与其上制造模具的晶片的其余部分分离。 薄金属层覆盖边缘区域的全部或部分，从而形成肖特基势垒。 该势垒在相邻的半导体材料中产生耗尽区。 耗尽区固有地产生能带分布，其优先地加速向金属产生或接近金属 - 半导体界面的少数载流子，从而通过保护结构的任何有源区域或光电二极管像素来抑制这些载流子的收集。

    Semiconductor device with laminated refractory metal schottky barrier gate electrode
    9.
    发明授权
    Semiconductor device with laminated refractory metal schottky barrier gate electrode 失效
    具有层压难熔金属肖特基势垒栅电极的半导体器件

    公开(公告)号：US5631479A

    公开(公告)日：1997-05-20

    申请号：US567991

    申请日：1995-12-04

    申请人： Toshihiko Shiga

    发明人： Toshihiko Shiga

    IPC分类号： H01L21/28 ,  H01L21/338 ,  H01L29/47 ,  H01L29/812 ,  H01L29/872 ,  H01L31/112 ,  H01L29/80

    CPC分类号： H01L31/1121 ,  H01L29/475

    摘要： A semiconductor device includes a semiconductor substrate having a surface; an active layer of a compound semiconductor disposed at the surface of the semiconductor substrate; and a Schottky barrier gate electrode including a multi-layer film alternately laminating a conductive refractory metal compound layer including a first refractory metal (M.sub.1) and a second refractory metal (M.sub.2) layer to three or more layers respectively, disposed on the active layer, thereby forming a Schottky junction with the active layer. The gate resistance of the Schottky barrier gate electrode can be held low and the internal stress can be reduced, whereby peeling off of the can be suppressed.

    摘要翻译： 半导体器件包括具有表面的半导体衬底; 设置在半导体衬底的表面的化合物半导体的有源层; 以及肖特基势垒栅电极，其包括分别设置在有源层上的三层以上交替层叠包含第一耐火金属（M1）和第二难熔金属（M2）层的导电性难熔金属化合物层的多层膜， 从而与活性层形成肖特基结。 可以将肖特基势垒栅极的栅极电阻保持为低，并且可以降低内部应力，从而可以抑制剥离。

    SENSORS AND ELECTRONIC DEVICES
    10.
    发明公开
    SENSORS AND ELECTRONIC DEVICES 审中-公开

    公开(公告)号：US20230163230A1

    公开(公告)日：2023-05-25

    申请号：US18151770

    申请日：2023-01-09

    申请人： Samsung Electronics Co., Ltd.

    发明人： Kyung Bae PARK ,  Sung Jun PARK ,  Feifei FANG ,  Sung Young YUN ,  Seon-Jeong LIM ,  Chul Joon HEO

    IPC分类号： H01L31/112 ,  H01L31/0224 ,  H01L31/0256

    CPC分类号： H01L31/1121 ,  H01L31/022408 ,  H01L31/0256

    摘要： A sensor includes a first electrode and a second electrode, and a photo-active layer between the first electrode and the second electrode. The photo-active layer includes a light absorbing semiconductor configured to form a Schottky junction with the first electrode. The photo-active layer has a charge carrier trapping site configured to capture photo-generated charge carriers generated based on the light absorbing semiconductor absorbing incident light that enters at least the photo-active layer at a position adjacent to the first electrode. The sensor is configured to have an external quantum efficiency (EQE) that is adjusted based on a voltage bias being applied between the first electrode and the second electrode.