Digital-to-analog sinusoidal driver apparatus, systems and methods
    1.
    发明授权
    Digital-to-analog sinusoidal driver apparatus, systems and methods 有权
    数模转正弦驱动装置,系统及方法

    公开(公告)号:US09112527B2

    公开(公告)日:2015-08-18

    申请号:US14135517

    申请日:2013-12-19

    IPC分类号: H03M1/66 G06G7/22 H02P8/22

    CPC分类号: H03M1/661 G06G7/22 H02P8/22

    摘要: Input codes are sequenced at a lower-resolution linear DAC and the output is converted to a linear current waveform. A first of two interconnected analog current multipliers multiplies the linear current by itself and by the inverse of a first constant current source to create a quadratic current output. A second current multiplier multiplies the quadratic output current by the linear current and by the inverse of a second constant current source to generate a cubic current output. The quadratic and cubic currents are subtracted from the linear current to generate an approximation of the first 180 degrees of a sine wave current. Alternate (pi to 2*pi) positive-going one-half sine waves may be polarity reversed to create a complete positive-going and negative-going sine-shaped electrical current of higher resolution than is available from a sine DAC of resolution equivalent to that of the lower-resolution linear DAC.

    摘要翻译: 输入代码在较低分辨率线性DAC上排序,输出转换为线性电流波形。 两个互连的模拟电流乘法器中的第一个将线性电流本身和第一恒定电流源的反相相乘以产生二次电流输出。 第二个电流倍增器将二次输出电流乘以线性电流和第二恒定电流源的倒数,以产生立方电流输出。 从线性电流中减去二次和三次电流,以产生正弦波电流的前180度的近似。 交替的(pi至2 * pi)正向半正弦波可能会极性反转,以产生比从等效于相同的分辨率的正弦DAC获得的更高分辨率的完整的正向和负向正弦形电流 低分辨率线性DAC的。

    ADDER, AND POWER COMBINER, QUADRATURE MODULATOR, QUADRATURE DEMODULATOR, POWER AMPLIFIER, TRANSMITTER AND WIRELESS COMMUNICATOR USING SAME
    2.
    发明申请
    ADDER, AND POWER COMBINER, QUADRATURE MODULATOR, QUADRATURE DEMODULATOR, POWER AMPLIFIER, TRANSMITTER AND WIRELESS COMMUNICATOR USING SAME 有权
    ADDER和POWER COMBINER,QUADRATURE MODULATOR,QUADRATURE DEMODULATOR,POWER AMPLIFIER,TRANSMITTER AND WIRELESS COMMUNICATOR USING SAME

    公开(公告)号:US20110223871A1

    公开(公告)日:2011-09-15

    申请号:US13127466

    申请日:2009-11-05

    摘要: To provide an adder capable of obtaining an addition signal of a plurality of high frequency signals, and also a power combiner, a quadrature modulator, a quadrature demodulator, a power amplifier, a transmitter, and a wireless communicator, each of which uses the adder. Impedances (Zg, Zh) seen from a common output point (P3) of a plurality of first impedance circuits (110a, 110b) toward respective input terminals (102a, 102b) are set so that high frequency currents (Ig, Ih) are approximately zero. An impedance (Zs) seen from a first connection point (P1) toward the input terminals (102a, 102b) is set so that a high frequency current (Is) is approximately zero. An impedance (Zc) seen from the first connection point (P1) toward a circuit (150) is set so that a high frequency current (Ic) is approximately zero. An impedance (Zm) seen from a second connection point (P2) toward a power supply is set so that a high frequency current (Im) is approximately zero.

    摘要翻译: 提供能够获得多个高频信号的加法信号的加法器,以及功率合成器,正交调制器,正交解调器,功率放大器,发送器和无线通信器,其中每一个使用加法器 。 从多个第一阻抗电路(110a,110b)的各个输入端(102a,102b)的公共输出点(P3)看到的阻抗(Zg,Zh)被设定为高频电流(Ig,Ih)近似 零。 从第一连接点(P1)朝向输入端子(102a,102b)看到的阻抗(Zs)被设定为高频电流(Is)近似为零。 设置从第一连接点(P1)朝向电路(150)看到的阻抗(Zc),使得高频电流(Ic)近似为零。 从第二连接点(P2)朝向电源看到的阻抗(Zm)被设定为高频电流(Im)近似为零。

    Method and circuit arrangement for multiplying frequency
    3.
    发明授权
    Method and circuit arrangement for multiplying frequency 失效
    用于倍频的方法和电路布置

    公开(公告)号:US06304997B1

    公开(公告)日:2001-10-16

    申请号:US09022017

    申请日:1998-02-11

    申请人: Klaus Huber

    发明人: Klaus Huber

    IPC分类号: G06F1750

    CPC分类号: G06G7/22 G06G7/20

    摘要: A method and circuit arrangement for frequency multiplication. A plurality of circuit modules for realizing Chebyshev polynomials of the nth order Tn(x)) are provided. The Chebyshev polynomials have arithmetic properties and are defined by Tn(cos(&ohgr;t))=cos(n&ohgr;t). The circuit modules are interconnected to form a modular circuit array or a modular circuit structure using one or more of the relations Tnm(x)=Tn(Tm(x)) and Tn+m(x)=Tn(x)Tm(x)−Tn−m(x). A cosinusoidal oscillation of a frequency is input into the Chebyshev circuit module (Tn(x)) to generate a cosinusoidal oscillation having n-fold frequency. Frequency multiplier circuits may be produced very simply and in modular form, making applications in telecommunications, in particular, very cost-effective.

    摘要翻译: 一种用于倍频的方法和电路装置。 提供了用于实现第n阶Tn(x)的切比雪夫多项式的多个电路模块)。 切比雪夫多项式具有算术性质,由Tn(cos(ωω))= cos(nomegat)定义。 电路模块互连以形成使用Tnm(x)= Tn(Tm(x))和Tn + m(x)= Tn(x)Tm(x)中的一个或多个的模块电路阵列或模块电路结构 )-Tn-m(x)。 将频率的余弦振荡输入到切比雪夫电路模块(Tn(x))中,以产生具有n倍频率的余弦振荡。 频率乘法器电路可以非常简单地并且以模块化的形式产生,使得在电信领域的应用特别是非常具有成本效益。

    Discrete cosine transformation circuit
    4.
    发明授权
    Discrete cosine transformation circuit 失效
    离散余弦变换电路

    公开(公告)号:US5862070A

    公开(公告)日:1999-01-19

    申请号:US820002

    申请日:1997-03-18

    CPC分类号: G06G7/22 G06F17/147

    摘要: A high-speed discrete cosine transformation circuit includes the one-dimensional input signals x(0) to x(7) being input in parallel to the positive input terminals "+" or the negative input terminals "-" of eight neural operation units (NOU) 11 to 18 through capacitors d0 to d6. In each NOU 11 to 18, input signals x(0) to x(7) are added and subtracted. Input signals x(0) to x(7) are multiplied beforehand by the coefficient in proportion to the capacities of capacitors d0 to d6 which are connected to NOU 11 to 18. Thereafter, discrete cosine transforming coefficients y(0) to y(7) are output. A two-dimensional discrete cosine transformation circuit is realized by using the one-dimensional discrete cosine transforming circuit.

    摘要翻译: 高速离散余弦变换电路包括与八个神经运算单元的正输入端子“+”或负输入端子“ - ”并联输入的一维输入信号x(0)〜x(7) NOU)11至18通过电容器d0至d6。 在每个NOU 11至18中,输入信号x(0)至x(7)被加和减。 输入信号x(0)至x(7)预先乘以与连接到NOU 11至18的电容器d0至d6的电容成比例的系数。之后,离散余弦变换系数y(0)至y(7 )被输出。 通过使用一维离散余弦变换电路实现二维离散余弦变换电路。

    Complex number calculation circuit
    5.
    发明授权
    Complex number calculation circuit 失效
    复数计算电路

    公开(公告)号:US5751624A

    公开(公告)日:1998-05-12

    申请号:US715732

    申请日:1996-09-19

    IPC分类号: G06G7/22 G06J1/00 G06C15/08

    CPC分类号: G06G7/22 G06J1/00

    摘要: A complex number calculation circuit for directly multiplying a complex number of an analog signal by a digital complex number as a multiplier. A capacitive coupling is used with a plurality of parallel capacitances corresponding to weights of bits of real and imaginary parts of the multiplier. The sign of the multiplier is represented by selection of output paths. A complex number calculation circuit for calculating approximated absolute values is suitable for an analog architecture. Inverter circuits are used for linear inversion of analog values, and capacitive couplings are used for weighted addition. Analog maximum and minimum circuits with parallel MOSs are used for maximum and minimum calculation.

    摘要翻译: 一种用于将复数个模拟信号乘以数字复数作为乘数的复数计算电路。 电容耦合用于与乘法器的实部和虚部的位的权重相对应的多个并联电容。 乘法器的符号由输出路径的选择表示。 用于计算近似绝对值的复数计算电路适用于模拟架构。 逆变电路用于模拟值的线性反演,电容耦合用于加权相加。 具有并联MOS的模拟最大和最小电路用于最大和最小计算。

    Opto electronic scale reading apparatus wherein each of a plurality of
detectors receives light from a corresponding emitter of a plurality of
light emitters
    6.
    发明授权
    Opto electronic scale reading apparatus wherein each of a plurality of detectors receives light from a corresponding emitter of a plurality of light emitters 失效
    光电子秤读取装置,其中多个检测器中的每一个接收来自多个发光体的相应发射器的光

    公开(公告)号:US4983828A

    公开(公告)日:1991-01-08

    申请号:US396808

    申请日:1989-08-21

    CPC分类号: G01D5/24409 G01D5/38 G06G7/22

    摘要: The invention provides an opto-electronic scale reading apparatus comprising a read head in which a plurality of optical emitter and receiver pairs are arranged so that beams of collimated light generated by the respective emitters fall on a common region of a scale. Compared to arrangements where the light beams fall on separate regions of the scale, the apparatus according to the invention is relatively immune to the effects of certain misalignments between the scale and the read head.

    摘要翻译: 本发明提供了一种光电刻度读取装置,包括读头,其中布置有多个光发射器和接收器对,使得由相应发射器产生的准直光束落在刻度的公共区域上。 与光束落在鳞片的不同区域上的布置相比,根据本发明的装置相对地免受了鳞片和读头之间某些不对准的影响。

    Trigonometric function generator
    7.
    发明授权
    Trigonometric function generator 失效
    三角函数发生器

    公开(公告)号:US4476538A

    公开(公告)日:1984-10-09

    申请号:US344544

    申请日:1982-02-01

    申请人: Barrie Gilbert

    发明人: Barrie Gilbert

    IPC分类号: G06G7/22

    CPC分类号: G06G7/22

    摘要: A universal trigonometric function generator which is selectively programmable by pin-strapping to generate any of the standard trigonometric functions (sine, cosine, tangent, cotangent, secant and cosecant). The circuit includes two identical sine-function generating networks each of which produces an output signal proportional to the sine of a corresponding angle input. These networks are so interrelated that the composite output signal is proportional to the angle input of one network and inversely proportional to the angle input of the other network, producing an output ##EQU1## where A is a controllable amplitude, .theta..sub.1 -.theta..sub.2 is the angle input to one network, and .phi..sub.1 -.phi..sub.2 is the angle input to the other network. By selectively connecting the input terminals for .theta..sub.1, .theta..sub.2, .phi..sub.1, .phi..sub.2 to an angle control signal and reference voltages corresponding to 0.degree. and 90.degree., any one of the standard trigonometric functions can be generated.

    摘要翻译: 通用三角函数发生器,可通过pin-strap进行选择性编程,以产生任何标准三角函数(正弦,余弦,正切,余切,割线和余弦)。 该电路包括两个相同的正弦函数产生网络,每个网络产生与对应角度输入的正弦成正比的输出信号。 这些网络是如此相互关联,使得复合输出信号与一个网络的角度输入成比例,并与另一个网络的角度输入成反比,从而产生输出,其中A是可控幅度,θ1-θ2是 输入到一个网络的角度,而phi 1-phi 2是输入到另一个网络的角度。 通过将θ1,theta 2,phi 1,phi 2的输入端子选择性地连接到角度控制信号和对应于0°和90°的参考电压,可以产生任何一种标准的三角函数。

    Electronic angle resolver
    8.
    发明授权
    Electronic angle resolver 失效
    电子角度旋转变压器

    公开(公告)号:US4335443A

    公开(公告)日:1982-06-15

    申请号:US106044

    申请日:1979-12-21

    申请人: Baron C. Dickey

    发明人: Baron C. Dickey

    IPC分类号: G06G7/22 G06J1/00

    CPC分类号: G06G7/22

    摘要: The circuit of the angle resolver compares a first angle to a second angle and produces an output voltage which is an analog representation of the angular difference between the two. One of the angles, which might be a controlled variable is represented by a pair of electrical signals from an electronic compass, for example, which are analog representations of the sine and cosine of the angle. Within the angle resolver circuitry, an analog switch and integrator form an output voltage which is accurately proportional to the sine of the angular difference between the two angles in accordance with: sine (A--B)=(sin A) (cos B)--(cos A) (sin B), where B might be the reference angle, and A, the unknown angle. For cases where A is nearly equal to B, A--B is a small angle, and sin (A--B)=A--B. The values of cos B and sin B are very simply linearly approximated in the present invention by the technique of sampling and integrating the sin A and cos A inputs. By the use of RC differentiators at the sin A and cos A inputs to the circuitry, the errors introduced by the linear approximations of cos B and sin B are compensated to a high degree with minimum cost and complexity.

    摘要翻译: 角度旋转变压器的电路将第一角度与第二角度进行比较,并产生作为两者之间的角度差的模拟表示的输出电压。 作为受控变量的角度之一由来自电子罗盘的一对电信号表示,例如,角度的正弦和余弦的模拟表示。 在角度分解器电路中,模拟开关和积分器形成与两个角度之间的角度差正弦成正比的输出电压:正弦(AB)=(sin A)(cos B) - (cos A)(sin B),其中B可能是参考角,A是未知角。 对于A近似等于B的情况,A-B为小角度,sin(A-B)= A-B。 在本发明中,通过对sin A和cos A输入进行采样和积分的技术,cos B和sin B的值非常简单地线性近似。 通过在电路的sin A和cos A输入端使用RC微分器,由cos B和sin B的线性近似引入的误差以最小的成本和复杂性被高度补偿。

    Integrator circuits for a constant velocity vector generator
    9.
    发明授权
    Integrator circuits for a constant velocity vector generator 失效
    用于恒速矢量发生器的积分器电路

    公开(公告)号:US4122528A

    公开(公告)日:1978-10-24

    申请号:US774712

    申请日:1977-03-04

    CPC分类号: G06G7/186 G06G7/22

    摘要: A Constant Velocity Vector Generator is disclosed for connecting X, Y coordinate points of a rectangular coordinate display system. A pair of absolute value amplifier circuits, a square-root-of-the-sum-of-the-squares circuit, a pair of dividers, and a pair of integrators are employed to convert simultaneous .DELTA.X and .DELTA.Y step voltages to ramp voltage pairs which are applied to appropriate X and Y deflection circuits of a graphic display device to produce straight-line traces whose velocities are constant for all vectors regardless of magnitude (line length) or direction (angle). Each vector may be drawn to any length or direction, immediately after which new data may be applied to the vector generator to initiate a new vector whose origin is the end point of the preceding vector. Such a system is particularly applicable to computer-drawn displays. The vector generating circuits are suitable for realization in a monolithic integrated circuit.

    摘要翻译: 公开了用于连接直角坐标显示系统的X,Y坐标点的恒速矢量发生器。 采用一对绝对值放大器电路,平方根平方电路,一对分频器和一对积分器将DELTA X和DELTA Y同步电压同步转换成斜坡 电压对被施加到图形显示装置的适当的X和Y偏转电路,以产生直线迹线,其速度对于所有矢量是恒定的,而不管幅度(线长度)还是方向(角度)。 每个向量可以被绘制到任何长度或方向,紧接着可以将新数据应用于向量生成器以启动其起始点是前一向量的终点的新向量。 这种系统特别适用于计算机绘制的显示器。 矢量生成电路适合在单片集成电路中实现。

    Fluid loading arm alarm system
    10.
    发明授权
    Fluid loading arm alarm system 失效
    流体装载ARM报警系统

    公开(公告)号:US4084247A

    公开(公告)日:1978-04-11

    申请号:US735730

    申请日:1976-10-26

    申请人: Peter Ball

    发明人: Peter Ball

    CPC分类号: B67D9/02 G06G7/22

    摘要: A system for sensing the position in space of the outer end of an articulated fluid loading arm while it is connected to a marine tanker or other transport vessel, and sounding an alarm if the arm's operating envelope is exceeded. The sensing system includes means for determining various angles representative of the orientation of the booms or limbs of the arm, and means for deriving from these angles an indication of the spatial location of the arm's outer end.