公开(公告)号：US11741259B2

公开(公告)日：2023-08-29

申请号：US18083423

申请日：2022-12-16

申请人： CyberAdjust, LLC

发明人： Ronald M Harstad

IPC分类号： G06F21/62 ,  G06F16/22 ,  G06F7/72

CPC分类号： G06F21/6245 ,  G06F7/72 ,  G06F16/221 ,  G06F7/721

摘要： A permutation algorithm using modular arithmetic is applied to the cells of one or more specific fields of a database or other file type. This permutation reorders the cells of the specific field(s) without altering content of any individual cell, thereby hiding relationships between cells of the permuted field(s) and the other information in the associated records. The permutation algorithm may use modular addition and modular subtraction, in either order. Different permutation algorithms may use varying numbers of parameters. To locate a specific cell in a permuted field, the parameter(s) from the permutation, an identification of the specific record associated with the cell, and an identification of the specific permuted field are applied in a modular arithmetic operation. A specific record with which a specific cell in a permuted field is associated may be obtained by an inverse modular arithmetic operation.

公开(公告)号：US20180060566A1

公开(公告)日：2018-03-01

申请号：US15442303

申请日：2017-02-24

申请人： STMicroelectronics (Rousset) SAS

发明人： Ibrahima Diop ,  Pierre-Yvan Liardet ,  Yanis Linge

IPC分类号： G06F21/52 ,  G06F7/72 ,  G06F7/523

CPC分类号： G06F21/52 ,  G06F7/523 ,  G06F7/72 ,  G06F7/723 ,  G06F2207/7242 ,  G06F2221/032

摘要： A method of protecting a modular calculation on a first number and a second number, executed by an electronic circuit, including the steps of: combining the second number with a third number to obtain a fourth number; executing the modular calculation on the first and fourth numbers, the result being contained in a first register or memory location; initializing a second register or memory location to the value of the first register or to one; and successively, for each bit at state 1 of the third number: if the corresponding bit of the fourth number is at state 1, multiplying the content of the second register or memory location by the inverse of the first number and placing the result in the first register or memory location, if the corresponding bit of the fourth number is at state 0, multiplying the content of the second register or memory location by the first number and placing the result in the first register or memory location.

公开(公告)号：US20170220320A1

公开(公告)日：2017-08-03

申请号：US15515391

申请日：2015-09-30

申请人： KONINKLIJKE PHILIPS N.V.

发明人： LEANDRO MARIN ,  ALPHONS ANTONIUS MARIA LAMBERTUS BRUEKERS ,  PAULUS MATHIAS HUBERTUS MECHTILDIS ANTONIUS GORISSEN

IPC分类号： G06F7/523 ,  G06F7/50

CPC分类号： G06F7/523 ,  G06F7/50 ,  G06F7/72 ,  G06F7/724 ,  H04L9/0618 ,  H04L2209/16

摘要： An electronic calculating device (100) for performing arithmetic in a commutative ring (Zn; Zn [x]/f(x)) is presented. The calculating device comprising a storage (110) arranged to store an increment table (T) defined for an increment ring element (1; ut), the increment table mapping an input ring element (k=uk1−uk2) to an output integer-list (T((k1 k2))=(I1, I2)) encoding an output ring element (I=uI1−uI2), such that the output ring element equals the increment ring element ring-added to the input ring element (I=k−1). Using the increment table, a ring addition unit (130) adds a first addition-input integer-list ((a1, a2)) encoding a first addition-input ring element and a second addition-input integer list ((b1, b2)) encoding a second addition-input ring element. The device may comprise a ring multiplication unit (140) also using the increment table.

公开(公告)号：US09596080B2

公开(公告)日：2017-03-14

申请号：US14365899

申请日：2012-12-12

申请人： INSIDE SECURE

发明人： Benoît Feix ,  Christophe Clavier ,  Pascal Paillier ,  Loïc Thierry

IPC分类号： H04L9/08 ,  G06F7/58 ,  G06F7/72 ,  G06F17/11

CPC分类号： H04L9/0869 ,  G06F7/58 ,  G06F7/72 ,  G06F17/11 ,  G06F2207/7204 ,  H04L9/0816 ,  H04L2209/24

摘要： This disclosure relates to methods for generating a prime number, which can be implemented in an electronic device. An example method can include calculating a candidate prime number using a formula Pr=2P·R+1, where P is a prime number and R is an integer. The method can also include applying the Pocklington primality test to the candidate prime number and rejecting the candidate prime number if it fails the Pocklington test. The integer can be generated from an invertible number belonging to a set of invertible elements modulo the product of numbers belonging to a group of small prime numbers greater than 2, where the candidate prime number is not divisible by any number of the group. The prime number P having a number of bits equal to within one bit, to half or a third of the number of bits of the candidate prime number.

摘要翻译： 本公开涉及可以在电子设备中实现的用于生成素数的方法。 示例性方法可以包括使用公式Pr = 2P·R + 1来计算候选素数，其中P是素数，R是整数。 该方法还可以包括将Pocklington原语测试应用于候选素数，如果Pocklington测试失败，则拒绝候选素数。 该整数可以从属于一组可逆元素的可逆数生成，该可逆元素模数属于小于2的小数的一组的乘积的乘积，其中候选素数不能被该组的任何数量整除。 素数P具有等于一位内的位数，至候选素数的比特数的一半或三分之一。

公开(公告)号：US09419793B2

公开(公告)日：2016-08-16

申请号：US14237363

申请日：2012-09-25

申请人： Feitian Technologies Co., Ltd.

发明人： Zhou Lu ,  Huazhang Yu

IPC分类号： G06F7/58 ,  H04L9/08 ,  G06F7/72

CPC分类号： H04L9/0819 ,  G06F7/72

摘要： A method for generating a large prime number in an embedded system, comprising: (1) setting all identifiers in an identifier group in a first storage area; generating and storing a random number with preset bit length in a third storage area; modulizing the data in the third storage area by using the data stored in the storage unit of a second storage area as a modulus; determining the serial number of the identifier to be reset in the identifier group according to the modulized value and the data in the storage unit corresponding to the modulized value; and resetting the identifier corresponding to the serial number; (2) judging whether a set identifier exists in the identifier group, if yes, then executing step (3); otherwise, returning to step (1); and (3), determining a number to be detected according to the random number and the serial number of the set identifier in the identifier group; detecting the primality of the number to be detected; if the number to be detected passes the primality detection, then outputting the number to be detected; and if the numbers to be detected corresponding to all the set identifiers in the identifier group fail to pass the primality detection, then returning to step (1). The present method has high efficiency and is suitable for an embedded system.

摘要翻译： 一种用于在嵌入式系统中生成大素数的方法，包括：（1）在第一存储区域中设置标识符组中的所有标识符; 在第三存储区域中生成并存储具有预设位长度的随机数; 通过使用存储在第二存储区域的存储单元中的数据作为模数来对第三存储区域中的数据进行模块化; 根据所述调制值和对应于所述模拟值的所述存储单元中的数据，确定所述标识符组中要重置的标识符的序列号; 并重新设置与序列号对应的标识符; （2）判断标识符组中是否存在集合标识符，如果是，则执行步骤（3）; 否则返回步骤（1）; 和（3）根据标识符组中的设置标识符的随机数和序列号来确定要检测的数量; 检测要检测的号码的原始性; 如果要检测的号码通过原色检测，则输出要检测的号码; 并且如果与标识符组中的所有集合标识符相对应的要检测的号码不能通过原色检测，则返回到步骤（1）。 本方法效率高，适用于嵌入式系统。

公开(公告)号：US20150363709A1

公开(公告)日：2015-12-17

申请号：US14763702

申请日：2013-08-26

申请人： NEC CORPORATION

发明人： Toshio KAMEI ,  Masato ISHII

IPC分类号： G06N99/00 ,  G06F7/72

CPC分类号： G06N20/00 ,  G06F7/72 ,  G06K9/6269 ,  G06K9/6276

摘要： A classifier learning apparatus (100) includes: an object acquisition unit (101) that acquires a set of reference vectors and assigned category information of the respective reference vectors as a processing object; a specifying unit (102) that specifies an internal nearest neighbor reference vector nearest to a sample vector among the reference vectors assigned to the same category as the sample vector and specifies an external nearest neighbor reference vector nearest to the sample vector among the reference vectors assigned to a category different from that of the sample vector; a calculation unit (103) that calculates an evaluation value of the processing object using a distance between the sample vector and a classification boundary formed by the internal nearest neighbor reference vector and the external nearest neighbor reference vector; and an updating unit (104) that updates an original set of reference vectors and original assigned category information with the processing object based on the evaluation value.

摘要翻译： 分类器学习装置（100）包括：对象获取单元（101），其获取一组参考矢量，并将各个参考矢量的分配类别信息作为处理对象; 指定单元（102），其指定与分配给与样本矢量相同类别的参考向量中最接近样本矢量的内部最近邻参考矢量，并指定分配给参考矢量中最接近样本矢量的外部最近邻参考矢量 到与样本载体不同的类别; 计算单元，其使用所述采样矢量与由所述内部最近邻参考矢量和所述外部最近邻参考矢量形成的分类边界之间的距离来计算所述处理对象的评价值; 以及更新单元（104），其基于所述评估值，利用所述处理对象来更新原始参考矢量集合和原始分配的类别信息。

公开(公告)号：US20150333906A1

公开(公告)日：2015-11-19

申请号：US14377499

申请日：2012-02-09

申请人： SK MD Mizanur RAHMAN ,  James MUIR

发明人： SK MD Mizanur RAHMAN ,  James MUIR

IPC分类号： H04L9/08

CPC分类号： H04L9/0869 ,  G06F7/58 ,  G06F7/72 ,  H04L9/0841 ,  H04L9/3066 ,  H04L2209/16

摘要： In the present disclosure, implementations of Diffie-Hellman key agreement are provided that, when embodied in software, resist extraction of cryptographically sensitive parameters during software execution by white-box attackers. Four embodiments are taught that make extraction of sensitive parameters difficult during the generation of the public key and the computation of the shared secret. The embodiments utilize transformed random numbers in the derivation of the public key and shared secret. The traditional attack model for Diffie-Hellman implementations considers only black-box attacks, where attackers analyze only the inputs and outputs of the implementation. In contrast, white-box attacks describe a much more powerful type of attacker who has total visibility into the software implementation as it is being executed.

摘要翻译： 在本公开中，提供了Diffie-Hellman密钥协议的实现，当以软件体现时，实现了由白盒攻击者在软件执行期间提取加密敏感参数。 教导了在公钥生成期间难以提取敏感参数以及计算共享秘密的四个实施例。 这些实施例在推导公钥和共享秘密时利用变换后的随机数。 Diffie-Hellman实施的传统攻击模式仅考虑黑匣子攻击，攻击者只分析实施的输入和输出。 相比之下，白盒攻击描述了一种更强大的攻击者类型，它们正在执行时对软件实现有全面的了解。

公开(公告)号：US09134959B2

公开(公告)日：2015-09-15

申请号：US14549236

申请日：2014-11-20

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shyh-An Chi

IPC分类号： H03K19/177 ,  H03K19/173 ,  G06F7/72 ,  H01L25/065 ,  H03K19/0175

CPC分类号： G06F7/72 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H03K19/017581 ,  H03K19/17736 ,  H03K19/1776

摘要： An integrated circuit die stack comprises a first die coupled with a second die. The first die has a first memory volume. The second die has a second memory volume different from the first memory volume. Each of the first and second dies comprises a functional circuitry and a programmable array coupled with the functional circuitry. The programmable arrays in the first and second dies are programmed to bypass one of the first die or the second die having the smaller of the first memory volume or the second memory volume at a first time period.

摘要翻译： 集成电路管芯堆叠包括与第二管芯耦合的第一管芯。 第一个模具具有第一个内存容量。 第二管芯具有与第一存储器体积不同的第二存储器体积。 第一和第二管芯中的每一个包括功能电路和与功能电路耦合的可编程阵列。 第一和第二管芯中的可编程阵列被编程为在第一时间段绕过具有第一存储器容积或第二存储器体积中的较小者的第一管芯或第二管芯中的一个。

公开(公告)号：US09032007B2

公开(公告)日：2015-05-12

申请号：US13664822

申请日：2012-10-31

申请人： Samsung SDS Co., Ltd.

发明人： Soon Mok Kwon ,  Seon Young Lee ,  Jung Hoon Sohn ,  Hyo Jin Yoon

IPC分类号： G06F7/00 ,  G06F7/72 ,  H04L9/30

CPC分类号： G06F7/72 ,  H04L9/3013

摘要： Distributed processing system and method for discrete logarithm calculation. The speed and resource efficiency of discrete logarithm calculation may be improved by allowing a plurality of operation agents to distributively process an operation of generating a modulo multiplication auxiliary table, an operation of generating a pre-calculation table, and an operation of searching for an answer by applying an iterated function for discrete logarithm calculation in a discrete logarithm calculation operation using the pre-calculation table.

摘要翻译： 分布式处理系统和离散对数计算方法。 可以通过允许多个操作代理分配地处理生成模乘法辅助表的操作，生成预计算表的操作和搜索答案的操作来提高离散对数计算的速度和资源效率 通过在使用预计算表的离散对数计算操作中应用用于离散对数计算的迭代函数。

公开(公告)号：US20150113029A1

公开(公告)日：2015-04-23

申请号：US14056480

申请日：2013-10-17

申请人： The MathWorks, Inc.

发明人： Robert O. ABERG ,  Aleksandar Bozin

IPC分类号： G06F17/17

CPC分类号： G06F17/17 ,  G06F7/72 ,  G06F17/10 ,  G06F17/5009

摘要： A device may determine historical state values to be used to calculate a current state value of a wrapped state associated with a model element. The wrapped state may be associated with a range of state values. The device may calculate the current state value of the wrapped state based on the historical state values, and may determine that the current state value is outside of the range of state values. The device may generate a modified current state value based on determining that the current state value is outside of the range of state values. The modified current state value may be within the range of state values. The device may modify a historical state value based on determining that the current state value is outside of the range of state values. The device may provide or store the modified current state value and the modified historical state value.

摘要翻译： 设备可以确定用于计算与模型元素相关联的包裹状态的当前状态值的历史状态值。 包装状态可能与一系列状态值相关联。 设备可以基于历史状态值计算包装状态的当前状态值，并且可以确定当前状态值在状态值的范围之外。 该装置可以基于确定当前状态值在状态值的范围之外而生成修改的当前状态值。 修改后的电流状态值可以在状态值的范围内。 设备可以基于确定当前状态值在状态值的范围之外来修改历史状态值。 设备可以提供或存储修改的当前状态值和修改的历史状态值。