公开(公告)号：US20170201278A1

公开(公告)日：2017-07-13

申请号：US15399472

申请日：2017-01-05

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Francois DEHMAS

IPC分类号： H04B1/10 ,  H04L7/00 ,  H04L27/22

CPC分类号： H04B1/1036 ,  G06F7/4818 ,  H04B1/0007 ,  H04L7/0054 ,  H04L7/0087 ,  H04L25/0202 ,  H04L27/0014 ,  H04L27/22 ,  H04L27/2273 ,  H04L27/2332 ,  H04L27/266 ,  H04L27/2679 ,  H04L27/38 ,  H04L27/3827 ,  H04L2027/003 ,  H04L2027/0055 ,  H04L2027/0057 ,  H04L2027/0065

摘要： A robust frequency drift tracking receiver. The received signal is translated to an intermediate frequency in the RF stage by a quadrature demodulator, and is then brought into the base band by a digital mixer made by a CORDIC. A base band processing, stage allows for a synchronisation of the receiver relative to the data frame, to estimate data and to output a counter-reaction signal to the CORDIC, obtained by integration of successive frequency corrections with a predetermined step.

公开(公告)号：US20160377427A1

公开(公告)日：2016-12-29

申请号：US15180236

申请日：2016-06-13

申请人： MURATA MANUFACTURING CO., LTD.

发明人： Rauli COLLIN ,  Antti FINNE

IPC分类号： G01C9/02 ,  G01P15/08

CPC分类号： G01C9/02 ,  G01C9/00 ,  G01P15/08 ,  G06F7/4818

摘要： A method is disclosed for performing calculations for an inclinometer device, as is a digital circuitry for performing such calculations. The circuitry comprises an interface for receiving detection signals from a sensor device and a CORDIC unit for performing calculation of inclinometer output values characterizing a resultant vector. The CORDIC calculation unit is configured to perform a calculation for resolving the angle between a resultant vector and a programmable reference value using hyperbolic CORDIC calculation. Pre-rotation may be performed for a vector before hyperbolic CORDIC arctangent calculation phases.

摘要翻译： 公开了一种用于执行倾斜计装置的计算的方法，以及用于执行这种计算的数字电路。 电路包括用于从传感器装置接收检测信号的接口和用于执行表征合成矢量的倾斜计输出值的计算的CORDIC单元。 CORDIC计算单元被配置为使用双曲线CORDIC计算来执行用于解析合成矢量和可编程参考值之间的角度的计算。 在双曲线CORDIC反正切计算阶段之前可以对矢量执行预旋转。

公开(公告)号：US08452830B2

公开(公告)日：2013-05-28

申请号：US12327395

申请日：2008-12-03

申请人： Phanimithra Gangalakurti ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShekhar Ayyalasomayajula

发明人： Phanimithra Gangalakurti ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShekhar Ayyalasomayajula

IPC分类号： G06F7/38

CPC分类号： G06F7/4818

摘要： A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

摘要翻译： CORDIC处理器具有多个级，每个级具有X输入，Y输入，符号输入，符号输出，X输出，Y输出，具有ROTATE或VECTOR值的模式控制输入，以及 每个CORDIC级具有通过移位Y输入k次而产生输出的第一移位，通过移位X个输入k次来产生输出的第二移位;当模式控制时，具有耦合到符号输入的输出的多路复用器 当模式输入为VECTOR时，输入为ROTATE和Y输入的符号，形成第一移位输出和多路复用器输出的乘积的第一乘法器，形成第二移位输出和反相多路复用器的乘积的第二乘法器 输出，从第一乘法器输出和X输入的和形成X输出的第一加法器和从第二乘法器输出和Y输入的和形成Y输出的第二加法器。

公开(公告)号：US07545878B1

公开(公告)日：2009-06-09

申请号：US10608374

申请日：2003-06-26

申请人： Eric K. Hall ,  Richard B. Ertel ,  Dan M. Griffin ,  Thomas R. Giallorenzi

发明人： Eric K. Hall ,  Richard B. Ertel ,  Dan M. Griffin ,  Thomas R. Giallorenzi

IPC分类号： H04B15/00

CPC分类号： G06F7/4818

摘要： A system for the efficient use of CORDIC rotators is provided. The system includes at least one first rotator operating in vector mode and includes a sign storage buffer. The system also includes at least one bit inverter coupled between the first rotator and a second rotator, the second rotator operating in rotation mode.

摘要翻译： 提供了一种有效利用CORDIC转子的系统。 该系统包括至少一个以向量模式操作的第一旋转器，并且包括符号存储缓冲器。 该系统还包括耦合在第一旋转器和第二旋转器之间的至少一个位逆变器，第二旋转器以旋转模式操作。

公开(公告)号：US20040039761A1

公开(公告)日：2004-02-26

申请号：US10651895

申请日：2003-08-29

发明人： Robert J. Van Wechel ,  Michael F. McKenney

IPC分类号： G06F003/00

CPC分类号： G01S19/24 ,  G01S19/29 ,  G01S19/37 ,  G06F7/4812 ,  G06F7/4818

摘要： An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The simultaneous detection of multiple frequencies allows the receiver to search the frequency range of the transmitted signal in larger increments of frequency, thereby increasing the speed of acquisition. One receiver does not use coherent integration before computation of the transform and advantageously maintains a flat frequency response. The flat frequency response of the DFT circuit enables searching of multiple frequency offsets without CPU intensive processing to compensate for frequency response variations. A receiver can include a Doppler correction circuit, which permits correlation data with frequency shift in the code to be non-coherently integrated among relatively fewer addresses or tap positions in memory.

摘要翻译： 一种装置和方法允许接收机快速获取伪随机噪声信号。 接收机有利地使用离散傅立叶变换（DFT）的紧凑并行处理硬件实现来检测频移。 同时检测多个频率允许接收机以更大的频率增量搜索发射信号的频率范围，从而提高采集速度。 一个接收机在计算变换之前不使用相干积分，有利地保持平坦的频率响应。 DFT电路的平坦频率响应使得能够搜索多个频率偏移，而无需CPU密集处理以补偿频率响应变化。 接收机可以包括多普勒校正电路，其允许与代码中的频移的相关数据在相对较少的地址或存储器中的抽头位置之间非相干地集成。

公开(公告)号：US20030076910A1

公开(公告)日：2003-04-24

申请号：US10207425

申请日：2002-07-26

发明人： Robert J. Van Wechel ,  Michael F. McKenney

IPC分类号： H04L007/00

CPC分类号： G01S19/24 ,  G01S19/29 ,  G01S19/37 ,  G06F7/4812 ,  G06F7/4818

摘要： An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The simultaneous detection of multiple frequencies allows the receiver to search the frequency range of the transmitted signal in larger increments of frequency, thereby increasing the speed of acquisition. One receiver does not use coherent integration before computation of the transform and advantageously maintains a flat frequency response. The flat frequency response of the DFT circuit enables searching of multiple frequency offsets without CPU intensive processing to compensate for frequency response variations. A receiver can include a Doppler correction circuit, which permits correlation data with frequency shift in the code to be non-coherently integrated among relatively fewer addresses or tap positions in memory.

摘要翻译： 一种装置和方法允许接收机快速获取伪随机噪声信号。 接收机有利地使用离散傅立叶变换（DFT）的紧凑并行处理硬件实现来检测频移。 同时检测多个频率允许接收机以更大的频率增量搜索发射信号的频率范围，从而提高采集速度。 一个接收机在计算变换之前不使用相干积分，有利地保持平坦的频率响应。 DFT电路的平坦频率响应使得能够搜索多个频率偏移，而无需CPU密集处理以补偿频率响应变化。 接收机可以包括多普勒校正电路，其允许与代码中的频移的相关数据在相对较少的地址或存储器中的抽头位置之间非相干地集成。

公开(公告)号：US4945505A

公开(公告)日：1990-07-31

申请号：US473126

申请日：1990-01-31

申请人： Alan I. Wiener ,  Waljeet S. Hundal

发明人： Alan I. Wiener ,  Waljeet S. Hundal

IPC分类号： G06F7/48 ,  G06F7/544

CPC分类号： G06F7/4818 ,  G06F7/5446

摘要： A cartesian to polar coordinate converter using a cordic magnitude circuit for estimating the magnitude and angle of a vector from its known orthogonal components. The vector is described in cartesian coordinates by the complex number I+jQ. The magnitude of the vector and its angle are approximated by an iterative process of successively rotating the vector toward one of the orthogonal axes and the cordic magnitude circuit is implemented in one very large scale integrated (VLSI) complementary metal-oxide semiconductor (CMOS) chip. In systems using a typical cordic magnitude circuit, accuracy increases in direct proportion to the number of rotations. The increase is accompanied by a need for an increased word size which results in a slower operating speed. The improved cordic magnitude circuit achieves higher precision without the need for a larger word size. The Q processing portion of the improved circuit takes advantage of the fact that each value of Q is reduced by one-half with each succeeding rotation after the first rotation, thereby vacating the most significant bit (MSB) position. By doubling the resultant value of Q, the MSB is refilled and the least significant bit (LSB) is vacated making room to accommodate the precision growth of one LSB associated with the next rotation. For small magnitude vectors, the I processing portion of the magnitude circuit left shifts the I and Q components by two bit positions at each rotation to accommodate two additional bits of precision in both the I and Q words.

摘要翻译： 笛卡尔坐标转换器，它使用一个用于从已知的正交分量估计矢量的幅度和角度的一个强度值电路。 矢量以笛卡尔坐标描述为复数I + jQ。 矢量的大小及其角度通过将矢量连续地旋转到正交轴之一的迭代过程来近似，并且绳型幅值电路在一个非常大规模的集成（VLSI）互补金属氧化物半导体（CMOS）芯片中实现 。 在使用典型的有绳振幅电路的系统中，精度与旋转数成正比地增加。 伴随着增加字体大小的增加，导致运行速度较慢。 改进的线性电路电路实现更高的精度，而不需要更大的字尺寸。 改进电路的Q处理部分利用了在第一次旋转之后每个随后的旋转Q的每个值减少一半的事实，从而腾出最高有效位（MSB）位置。 通过使Q的结果值加倍，MSB被重新填充，并且最低有效位（LSB）腾空，以适应与下一个旋转相关​​联的一个LSB​​的精度增长的空间。 对于小幅度矢量，幅度电路的I处理部分在每次旋转时将I和Q分量移位两位，以容纳I和Q字中的两个附加位精度。

公开(公告)号：US20140195579A1

公开(公告)日：2014-07-10

申请号：US13894321

申请日：2013-05-14

申请人： Alan N. WILLSON,, JR.

发明人： Alan N. WILLSON,, JR.

IPC分类号： G06F7/548

CPC分类号： G06F7/548 ,  G06F7/4818

摘要： An apparatus and method for angle rotation is disclosed to rotate a complex input by the angle θ to produce a rotated complex output signal. A memory storage device generates control information based on a coarse angle θM. A coarse rotation butterfly circuit uses the control information to rotate the complex input signal by the coarse angle θM to produce an intermediate complex number. The control information controls one or more multiplexers and/or adders in the coarse rotation butterfly circuit to rotate the complex input signal. The fine rotation butterfly circuit uses the control information to rotate the intermediate complex number by a fine angle θL to produce the complex output signal. The control information controls one or more multiplexers and/or adders in the fine rotation butterfly circuit to rotate the intermediate complex number.

摘要翻译： 公开了一种用于角度旋转的装置和方法，以使复数输入旋转角度和角度; 以产生旋转的复数输出信号。 存储器存储装置根据粗略角度生成控制信息; M。 粗旋转蝶形电路使用控制信息使复数输入信号以粗角度＆M; M旋转以产生中间复数。 控制信息控制粗略旋转蝶形电路中的一个或多个多路复用器和/或加法器来旋转复合输入信号。 精细旋转蝶形电路使用控制信息将中间复数旋转一个微小的角度，以产生复数输出信号。 控制信息控制微旋转蝶形电路中的一个或多个多路复用器和/或加法器来旋转中间复数。

公开(公告)号：US08706787B2

公开(公告)日：2014-04-22

申请号：US12676675

申请日：2007-09-26

申请人： James Awuor Oduor Okello

发明人： James Awuor Oduor Okello

IPC分类号： G06F17/14 ,  G06F7/38 ,  G06F7/32 ,  G06F7/52

CPC分类号： G06F17/142 ,  G06F7/4818

摘要： Provided two CORDIC processors, each including: two input ports representing real and imaginary input ports; and two output ports representing real and imaginary output ports; wherein real and imaginary parts of a first input signal are applied to the imaginary input ports of the first and second CORDIC processors; real and imaginary parts of a second input signal are applied to the real input ports of the first and second CORDIC processors; the first and second CORDIC processors rotate the respective input signals applied thereto by 45 degrees in the clockwise direction; respective data from the real output ports of said first and second CORDIC processors constitute real and imaginary parts of a first output signal; and respective data from the imaginary output ports of said first and second CORDIC processors constitute real part and imaginary part of a second output signal.

摘要翻译： 提供两个CORDIC处理器，每个处理器包括：两个输入端口，表示实部和虚拟输入端口; 和两个输出端口，表示实际和虚拟输出端口; 其中第一输入信号的实部和虚部被施加到第一和第二CORDIC处理器的虚拟输入端口; 第二输入信号的实部和虚部被施加到第一和第二CORDIC处理器的实际输入端口; 第一和第二CORDIC处理器将施加到其上的各个输入信号沿顺时针方向旋转45度; 来自所述第一和第二CORDIC处理器的实际输出端口的相应数据构成第一输出信号的实部和虚部; 并且来自所述第一和第二CORDIC处理器的虚拟输出端口的相应数据构成第二输出信号的实部和虚部。

公开(公告)号：US08521796B2

公开(公告)日：2013-08-27

申请号：US12277388

申请日：2008-11-25

申请人： Jianhui Hou

发明人： Jianhui Hou

IPC分类号： G06F1/00 ,  G06F7/38

CPC分类号： G06F7/4818

摘要： This disclosure relates to setting the iteration count of a Cordic module as a function of a signal characteristic of an input signal provided to the Cordic module.

摘要翻译： 本公开涉及将Cordic模块的迭代计数设置为提供给Cordic模块的输入信号的信号特性的函数。