Abstract:
A method and an apparatus for providing a high voltage to a node of a low voltage tolerant CMOS integrated circuit process. In one embodiment, a pull up circuit is coupled between a high voltage source and the node and a pull down circuit is coupled between the node and a second voltage. The pull up circuit is configured to pull the voltage at the node to a high voltage while the pull down circuit is configured to the voltage at the node to a lower voltage. The pull down circuit includes a pair of series coupled n-channel transistors coupled between the node and the second voltage. The n-channel transistor connected to the node is a special n-channel transistor with a drain to substrate junction breakdown that is greater than the drain to substrate junction breakdown voltage of other ordinary n-channel transistors in the process. The special n-channel transistor is manufactured in an ordinary state-of-the-art CMOS integrated circuit process without adding any costly process steps.
Abstract:
A self-cleaning litter box is disclosed which provides various advantages over the prior art. In particular, in one embodiment, the self-cleaning litter box is configured to use a cartridge which may include a litter compartment and a waste compartment. In another embodiment, the cartridge may be non-compartmentalized. The cartridge may be disposable, thus eliminating the need for the user to clean the litter tray and handle heavy litter containers. In other embodiments, the system includes a rake assembly configured with a drive assembly that is protected from contamination. In accordance with another embodiment of the invention, the self-cleaning litter box is configured to be used with all types of litter including crystal type litter.