公开(公告)号：US5663091A

公开(公告)日：1997-09-02

申请号：US644335

申请日：1996-05-09

申请人： Yeouchung Yen ,  Shih-Oh Chen ,  Hung-Kwei Hu

发明人： Yeouchung Yen ,  Shih-Oh Chen ,  Hung-Kwei Hu

IPC分类号： H01L23/525 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A method for fabricating the antifuse of the present invention comprises the steps of forming a lower antifuse electrode; forming a relatively thick interlayer dielectric layer over the surface of the lower antifuse electrode; forming a masking layer, preferably a photoresist, including an aperture therein having a first area over the interlayer dielectric layer; performing a first vertical etching step on the interlayer dielectric layer to a first selected depth; enlarging the aperture in the masking layer until it has a second area; performing a final vertical etching step on the interlayer dielectric layer to expose the upper surface of the lower electrode. Depending on the thickness of the interlayer dielectric, additional enlarging steps and vertical etching steps may be performed prior to the final vertical etching step which exposes the upper surface of the lower electrode. An aperture having a staircase profile is thereby formed, the aperture having a number of steps thus reducing and/or eliminating cusping and/or thinning at the corner and bottom of the antifuse cell opening allowing for the uniform deposit of dielectric and upper antifuse electrode materials.

摘要翻译： 制造本发明的反熔丝的方法包括以下步骤：形成下反熔丝电极; 在所述下部反熔丝电极的表面上形成相对较厚的层间电介质层; 形成掩模层，优选光致抗蚀剂，包括其中具有在所述层间介质层上的第一区域的孔; 在所述层间电介质层上进行第一垂直蚀刻步骤至第一选定深度; 扩大掩模层中的孔径，直到其具有第二区域; 在层间电介质层上进行最终的垂直蚀刻步骤以暴露下电极的上表面。 取决于层间电介质的厚度，可以在暴露下电极的上表面的最终垂直蚀刻步骤之前执行附加的放大步骤和垂直蚀刻步骤。 由此形成具有阶梯轮廓的孔，所述孔具有多个步骤，从而减少和/或消除了在反熔丝电池开口的角落和底部的捣实和/或变薄，从而均匀地沉积介电层和上部反熔丝电极材料 。

公开(公告)号：US5550404A

公开(公告)日：1996-08-27

申请号：US292801

申请日：1994-08-10

申请人： Yeouchung Yen ,  Shih-Oh Chen ,  Hung-Kwei Hu

发明人： Yeouchung Yen ,  Shih-Oh Chen ,  Hung-Kwei Hu

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  H01L2924/3011

摘要： An antifuse comprises a lower electrode and an upper electrode separated by an interlayer dielectric. An antifuse cell opening is disposed in the interlayer dielectric. The antifuse cell opening comprises at least two steps, wherein a first portion thereof has a first area and a second portion thereof disposed above the first portion has a second area larger than said first area. Additional portions may be provided above the second portion having successively larger areas if the thickness of the interlayer dielectric warrants their inclusion.

摘要翻译： 反熔丝包括由层间电介质隔开的下电极和上电极。 反熔丝电池开口设置在层间电介质中。 反熔丝电池开口包括至少两个步骤，其中其第一部分具有第一区域，并且设置在第一部分上方的第二部分具有大于所述第一区域的第二区域。 如果层间电介质的厚度保证其包含，则可以在第二部分上方设置附加部分，其具有相继较大的面积。

公开(公告)号：US5633189A

公开(公告)日：1997-05-27

申请号：US425122

申请日：1995-04-18

申请人： Yeouchung Yen ,  Shih-Oh Chen

发明人： Yeouchung Yen ,  Shih-Oh Chen

IPC分类号： H01L23/525 ,  H01L21/70

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the bottom electrode, a first barrier metal layer disposed by means of collimated sputter deposition in the antifuse cell opening to form a layer of uniform thickness existing only within the antifuse cell opening in order to protect the antifuse material layer from diffusion from the bottom electrode and to form an effective bottom electrode of reduced area, hence reducing the capacitance of the device, an antifuse material layer disposed in the antifuse cell opening and over the first barrier metal layer, a second barrier metal layer disposed over the antifuse material layer and optionally formed by collimated sputter deposition, and a top electrode disposed over the second barrier metal layer.

摘要翻译： 本发明的反熔丝结构包括底部平面化电极，设置在底部电极上的ILD，暴露底部电极的ILD中和穿过暴露底部电极的ILD的反熔丝电池，通过反熔丝中的准直溅射沉积设置的第一阻挡金属层 电池开口以形成仅在反熔丝电池开口内存在的均匀厚度的层，以便防止反熔丝材料层从底部电极扩散并形成减小面积的有效底部电极，从而降低器件的电容， 反熔丝材料层设置在第一阻挡金属层的反熔丝电池开口中，第二阻挡金属层设置在反熔丝材料层上并且任选地通过准直的溅射沉积形成;以及顶部电极，设置在第二阻挡金属层上。

公开(公告)号：US5543656A

公开(公告)日：1996-08-06

申请号：US328247

申请日：1994-10-24

申请人： Yeouchung Yen ,  Shih-Oh Chen

发明人： Yeouchung Yen ,  Shih-Oh Chen

IPC分类号： H01L21/768 ,  H01L23/525 ,  H01L23/532 ,  H01L23/48 ,  H01L27/02 ,  H01L29/46 ,  H01L29/62

CPC分类号： H01L23/53223 ,  H01L23/5252 ,  H01L2924/0002

摘要： The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the bottom electrode, a first barrier metal layer disposed by means of collimated sputter deposition in the antifuse cell opening to form a layer of uniform thickness existing only within the antifuse cell opening in order to protect the antifuse material layer from diffusion from the bottom electrode and to form an effective bottom electrode of reduced area, hence reducing the capacitance of the device, an antifuse material layer disposed in the antifuse cell opening and over the first barrier metal layer, a second barrier metal layer disposed over the antifuse material layer and optionally formed by collimated sputter deposition, and a top electrode disposed over the second barrier metal layer.

摘要翻译： 本发明的反熔丝结构包括底部平面化电极，设置在底部电极上的ILD，暴露底部电极的ILD中和穿过暴露底部电极的ILD的反熔丝电池，通过反熔丝中的准直溅射沉积设置的第一阻挡金属层 电池开口以形成仅在反熔丝电池开口内存在的均匀厚度的层，以便防止反熔丝材料层从底部电极扩散并形成减小面积的有效底部电极，从而降低器件的电容， 反熔丝材料层设置在第一阻挡金属层的反熔丝电池开口中，第二阻挡金属层设置在反熔丝材料层上并且任选地通过准直的溅射沉积形成;以及顶部电极，设置在第二阻挡金属层上。

公开(公告)号：US5780323A

公开(公告)日：1998-07-14

申请号：US758281

申请日：1996-11-12

申请人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

发明人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

IPC分类号： H01L21/768 ,  H01L23/525 ,  H01L21/82

CPC分类号： H01L23/5252 ,  H01L21/76888 ,  H01L2924/0002

摘要： According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers. According to a second aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer comprising a first nitride/first amorphous silicon/second nitride/second amorphous silicon sandwich under a plug of an electrically conductive material lined with titanium disposed between two metallization layers. In this aspect of the invention the titanium is allowed to react with the second amorphous silicon layer to form an electrically conductive silicide. This leaves the first nitride/first amorphous silicon/second nitride as the antifuse material layer while guaranteeing a strict control on the thickness of the antifuse material layer for assuring strict control over its respective breakdown or programming voltage. According to a third aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer disposed over a plug of an electrically conductive material disposed between two metallization layers.

摘要翻译： 根据本发明的第一方面，能够进行高密度制造的反熔丝结构包括设置在两个金属化层之间的导电材料的插头下方的反熔丝材料层。 根据本发明的第二方面，能够进行高密度制造的反熔丝结构包括反熔丝材料层，该反熔丝材料层包含第一氮化物/第一非晶硅/第二氮化物/第二非晶硅夹层，所述第一氮化物/第一非晶硅/第二氮化物/ 在两个金属化层之间。 在本发明的这个方面，允许钛与第二非晶硅层反应形成导电硅化物。 这使得第一氮化物/第一非晶硅/第二氮化物作为反熔丝材料层，同时保证对反熔丝材料层的厚度的严格控制，以确保严格控制其各自的击穿或编程电压。 根据本发明的第三方面，能够进行高密度制造的反熔丝结构包括设置在设置在两个金属化层之间的导电材料的插塞之上的反熔丝材料层。

公开(公告)号：US5576576A

公开(公告)日：1996-11-19

申请号：US377496

申请日：1995-01-24

申请人： Frank W. Hawley ,  Yeouchung Yen

发明人： Frank W. Hawley ,  Yeouchung Yen

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  Y10S148/055

摘要： A method for fabricating a metal-to-metal antifuse comprises the steps of (1) forming and defining a first metal interconnect layer; (2) forming an interlayer dielectric layer; (3) forming an antifuse via in the interlayer dielectric layer to expose the first metal interconnect layer; (4) depositing a via metal layer into a portion of the volume defining the antifuse via; (5) forming a planarizing layer of an insulating material in the antifuse via sufficient to fill a remaining portion of the volume defining the antifuse via; (6) etching the planarizing layer to expose an upper surface of the via metal layer and an upper surface of the interlayer dielectric layer so as to form a substantially planar surface comprising the upper surface of the interlayer dielectric layer, the planarizing layer, and the upper surface of the via metal layer; (7) forming an antifuse material layer over the substantially planar surface; (8) forming a metal capping layer over the antifuse material layer; and (9) defining the antifuse material layer and the metal capping layer.

摘要翻译： 制造金属对金属反熔丝的方法包括以下步骤：（1）形成和限定第一金属互连层; （2）形成层间电介质层; （3）在所述层间电介质层中形成反熔丝通孔以暴露所述第一金属互连层; （4）将通孔金属层沉积到限定反熔丝通孔的体积的一部分中; （5）在所述反熔丝中形成绝缘材料的平坦化层，以足以填充限定所述反熔丝通孔的所述体积的剩余部分; （6）蚀刻平坦化层以暴露通孔金属层的上表面和层间电介质层的上表面，以便形成基本平坦的表面，该表面包括层间电介质层的上表面，平坦化层和 通孔金属层的上表面; （7）在所述基本上平坦的表面上形成反熔丝材料层; （8）在所述反熔丝材料层上形成金属覆盖层; 和（9）限定反熔丝材料层和金属覆盖层。

公开(公告)号：US5369054A

公开(公告)日：1994-11-29

申请号：US87942

申请日：1993-07-07

申请人： Yeouchung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

发明人： Yeouchung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

IPC分类号： H01L23/525 ,  H01L23/60 ,  H01L21/44 ,  H01L21/48

CPC分类号： H01L23/5252 ,  H01L23/60 ,  H01L2924/0002

摘要： A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures.A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.

摘要翻译： 用于反熔丝的静电保护装置包括比设置在相同的电极间介电层中的反熔丝孔小的面积小的附加的第二尺寸孔。 防污材料设置在第二尺寸的孔中，并且上电极在第二孔和第一孔上延伸。 用于制造保护装置的优选方法利用形成较小孔径并与形成反熔丝孔同时形成其反熔丝材料层的步骤。 用于反熔丝装置的静电保护装置包括具有比第一尺寸的反熔丝孔大的面积的额外的第二尺寸孔。 将金属塞材料沉积并回蚀刻。 在第一和第二尺寸的孔上形成并限定一层非晶硅反熔丝材料，形成在较大部分填充的反熔丝保护器件单元上的部分较薄。

公开(公告)号：US5614756A

公开(公告)日：1997-03-25

申请号：US284054

申请日：1994-08-01

申请人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

发明人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

IPC分类号： H01L21/768 ,  H01L23/525 ,  H01L23/532 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L21/76888 ,  H01L23/53223 ,  H01L2924/0002

摘要： According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers, According to a second aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer comprising a first nitride/first amorphous silicon/second nitride/second amorphous silicon sandwich under a plug of an electrically conductive material lined with titanium disposed between two metallization layers. In this aspect of the invention the titanium is allowed to react with the second amorphous silicon layer to form an electrically conductive silicide. This leaves the first nitride/first amorphous silicon/second nitride as the antifuse material layer while guaranteeing a strict control on the thickness of the antifuse material layer for assuring strict control over its respective breakdown or programming voltage. According to a third aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer disposed over a plug of an electrically conductive material disposed between two metallization layers.

摘要翻译： 根据本发明的第一方面，能够进行高密度制造的反熔丝结构包括设置在两个金属化层之间的导电材料的插塞下方的反熔丝材料层。根据本发明的第二方面，提供一种反熔丝结构， 高密度制造包括反熔丝材料层，该反熔丝材料层包括第一氮化物/第一非晶硅/第二氮化物/第二非晶硅夹层，所述第一氮化物/第一非晶硅/第二氮化物/第二非晶硅夹层在布置在两个金属化层之间的配有钛的导电材料的插塞下方。 在本发明的这个方面，允许钛与第二非晶硅层反应形成导电硅化物。 这使得第一氮化物/第一非晶硅/第二氮化物作为反熔丝材料层，同时保证对反熔丝材料层的厚度的严格控制，以确保严格控制其各自的击穿或编程电压。 根据本发明的第三方面，能够进行高密度制造的反熔丝结构包括设置在设置在两个金属化层之间的导电材料的插塞之上的反熔丝材料层。

公开(公告)号：US5763898A

公开(公告)日：1998-06-09

申请号：US726347

申请日：1996-10-03

申请人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

发明人： Abdul R. Forouhi ,  Frank W. Hawley ,  John L. McCollum ,  Yeouchung Yen

IPC分类号： H01L21/768 ,  H01L23/525 ,  H01L23/532 ,  H01L29/38

CPC分类号： H01L23/5252 ,  H01L21/76888 ,  H01L23/53223 ,  H01L2924/0002

摘要： According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers. According to a second aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer comprising a first nitride/first amorphous silicon/second nitride/second amorphous silicon sandwich under a plug of an electrically conductive material lined with titanium disposed between two metallization layers. In this aspect of the invention the titanium is allowed to react with the second amorphous silicon layer to form an electrically conductive silicide. This leaves the first nitride/first amorphous silicon/second nitride as the antifuse material layer while guaranteeing a strict control on the thickness of the antifuse material layer for assuring strict control over its respective breakdown or programming voltage. According to a third aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer disposed over a plug of an electrically conductive material disposed between two metallization layers.

摘要翻译： 根据本发明的第一方面，能够进行高密度制造的反熔丝结构包括设置在两个金属化层之间的导电材料的插头下方的反熔丝材料层。 根据本发明的第二方面，能够进行高密度制造的反熔丝结构包括反熔丝材料层，该反熔丝材料层包括第一氮化物/第一非晶硅/第二氮化物/第二非晶硅夹层，所述第一氮化物/第一非晶硅/第二氮化物/ 在两个金属化层之间。 在本发明的这个方面，允许钛与第二非晶硅层反应形成导电硅化物。 这使得第一氮化物/第一非晶硅/第二氮化物作为反熔丝材料层，同时保证对反熔丝材料层的厚度的严格控制，以确保严格控制其各自的击穿或编程电压。 根据本发明的第三方面，能够进行高密度制造的反熔丝结构包括设置在设置在两个金属化层之间的导电材料的插塞之上的反熔丝材料层。

公开(公告)号：US5656534A

公开(公告)日：1997-08-12

申请号：US607375

申请日：1996-02-27

申请人： Wenn-Jei Chen ,  Huan-Chung Tseng ,  Yeouchung Yen ,  Linda Liu

发明人： Wenn-Jei Chen ,  Huan-Chung Tseng ,  Yeouchung Yen ,  Linda Liu

IPC分类号： H01L23/525 ,  H01L23/60 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L23/5252 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10S438/954

摘要： The present invention is directed to providing an electrostatic discharge ("ESD") protection cell for use in an integrated circuit device including antifuses. The ESD protection cell is formed simultaneously with the antifuses that it protects and provides protection from ESD during the fabrication of the antifuses. The concept is to use thin undoped or doped polysilicon on top of antifuse material as a block etching mask for the formation of the ESD protection cells by using common etching techniques. This polysilicon mask is placed where the antifuses will be and not where the ESD protection cells will be. The polysilicon mask is then merged with a top polysilicon electrode during later processing. During the block etching process, the antifuse material layer is compromised in the region about the ESD protection cells. Where the antifuse material layer is an O--N--O sandwich, the top oxide and nitride layers may be etching during the block etching process leaving the thin bottom oxide layer and some or no residual bottom oxide of the ONO composite antifuse material layer for forming the ESD protection cell. Since etching into the bottom oxide of the ONO composite antifuse material layer will not degrade, but will enhance the ESD protection capability of the ESD protection cell, it is perfectly acceptable to also etch the bottom oxide layer as well as long as proper process control is allowed. The ESD protection cell may be used with antifuses having diffusion or polysilicon type bottom electrodes and polysilicon top electrodes. An advantage of this structure is its ability to be fabricated at high temperature for improved film characteristics and reliability.

摘要翻译： 本发明旨在提供一种用于包括反熔丝的集成电路装置中的静电放电（“ESD”）保护电池。 ESD保护电池与其保护的反熔丝同时形成，并且在制造抗反熔丝期间提供防止ESD的保护。 该概念是在反熔丝材料的顶部上使用薄的未掺杂或掺杂的多晶硅作为用于通过使用常规蚀刻技术形成ESD保护电池的块蚀刻掩模。 将该多晶硅掩模放置在反熔丝将会存在的地方，而不是ESD保护电池的地方。 然后在后续处理期间将多晶硅掩模与顶部多晶硅电极合并。 在块蚀刻工艺期间，反熔丝材料层在围绕ESD保护电池的区域中受损。 当反熔丝材料层为ONO夹层时，顶部氧化物层和氮化物层可以在块蚀刻工艺期间进行蚀刻，留下薄的底部氧化物层和用于形成ESD保护电极的ONO复合反熔丝材料层的一些或不存在底部氧化物 。 由于蚀刻到ONO复合反熔体材料层的底部氧化物不会降解，而是将增强ESD保护电池的ESD保护能力，所以也可以蚀刻底部氧化物层，以及正确的过程控制是 允许 ESD保护电池可以与具有扩散或多晶硅型底电极和多晶硅顶电极的反熔丝一起使用。 该结构的优点是其在高温下制造以提高膜特性和可靠性的能力。