公开(公告)号：US07395035B2

公开(公告)日：2008-07-01

申请号：US11407954

申请日：2006-04-21

申请人： Yao-Chi Wang ,  Ying-Tang Chang

发明人： Yao-Chi Wang ,  Ying-Tang Chang

IPC分类号： H01Q11/12

CPC分类号： H04L25/0272 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D2200/0047 ,  H03D2200/009

摘要： An up-conversion mixing system with high carrier suppression, which includes first and second LPFs to filter a first and a second input signals to thereby produce a first and a second filtered signals respectively; a first amplifier to amplify the first input signal and the first filtered signal to thereby produce a first amplified signal; a second amplifier to amplify the second input signal and the second filtered signal to thereby produce a second amplified signal, wherein the second amplifier is cross-coupled with the first amplifier in order to couple the first and the second amplified signals, thereby reducing a DC offset of a differential voltage output by the first and the second differential output terminals; and a switch to receive a differential local oscillation signal to shift the first and the second amplified signals up to frequencies associated with the local oscillation signal.

摘要翻译： 一种具有高载波抑制的上变频混频系统，其包括第一和第二LPF以滤除第一和第二输入信号，从而分别产生第一和第二滤波信号; 第一放大器，用于放大第一输入信号和第一滤波信号，从而产生第一放大信号; 第二放大器，用于放大第二输入信号和第二滤波信号从而产生第二放大信号，其中第二放大器与第一放大器交叉耦合，以耦合第一和第二放大信号，从而减少DC 由第一差分输出端子和第二差分输出端子输出的差分电压的偏移; 以及接收差分本地振荡信号以将第一和第二放大信号移动到与本地振荡信号相关联的频率的开关。

公开(公告)号：US07362141B2

公开(公告)日：2008-04-22

申请号：US11407941

申请日：2006-04-21

申请人： Yao-Chi Wang ,  Ying-Tang Chang ,  Ching-Wen Pan ,  Chin-Pin Yu

发明人： Yao-Chi Wang ,  Ying-Tang Chang ,  Ching-Wen Pan ,  Chin-Pin Yu

IPC分类号： H03F3/45

CPC分类号： H03K19/00361

摘要： A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is connected to the digital logic gate in order to provide a fixed voltage to the digital logic gate to thus reduce an output voltage swing of the digital logic gate. The current-limited circuit is connected to the digital logic gate in order to provide a fixed current to the digital logic gate to thus reduce a transient current of the digital logic gate. Accordingly, an electromagnetic interface (EMI) caused by switching of the digital logic gate is reduced with the reduced output voltage swing and transient current.

摘要翻译： 具有低电磁干扰的逻辑器件。 逻辑器件包括数字逻辑门，电压限制电路和限流电路。 数字逻辑门提供相应的数字逻辑功能。 电压限制电路连接到数字逻辑门，以便向数字逻辑门提供固定电压，从而降低数字逻辑门的输出电压摆幅。 电流限制电路连接到数字逻辑门，以便向数字逻辑门提供固定电流，从而减少数字逻辑门的瞬态电流。 因此，由于数字逻辑门的切换引起的电磁接口（EMI）随着输出电压摆幅和瞬态电流的降低而降低。

公开(公告)号：US07298203B2

公开(公告)日：2007-11-20

申请号：US11365514

申请日：2006-03-02

申请人： Yao-Chi Wang ,  Ying-Tang Chang

发明人： Yao-Chi Wang ,  Ying-Tang Chang

IPC分类号： H03F1/02

CPC分类号： H03F3/45968 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45744 ,  H03F2200/294 ,  H03F2200/372

摘要： An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.

摘要翻译： 一种能够降低基带信号中具有第一和第二差分输出端，第一和第二低通滤波器以及第一和第二放大器的DC偏移的放大系统。 第一低通滤波器对第一输入信号进行滤波，从而产生第一滤波信号。 第一放大器放大第一输入信号和第一滤波信号，从而产生第一放大信号。 第二低通滤波器对第二输入信号进行滤波，从而产生第二滤波信号。 第二放大器放大第二输入信号和第二滤波信号，从而产生第二放大信号。 该系统在第一和第二差分输出端耦合第一和第二放大信号，从而减小由第一和第二差分输出端输出的差分电压信号的直流偏移。

公开(公告)号：US20060269013A1

公开(公告)日：2006-11-30

申请号：US11407954

申请日：2006-04-21

申请人： Yao-Chi Wang ,  Ying-Tang Chang

发明人： Yao-Chi Wang ,  Ying-Tang Chang

IPC分类号： H04L27/00

CPC分类号： H04L25/0272 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D2200/0047 ,  H03D2200/009

摘要： An up-conversion mixing system with high carrier suppression, which includes first and second LPFs to filter a first and a second input signals to thereby produce a first and a second filtered signals respectively; a first amplifier to amplify the first input signal and the first filtered signal to thereby produce a first amplified signal; a second amplifier to amplify the second input signal and the second filtered signal to thereby produce a second amplified signal, wherein the second amplifier is cross-coupled with the first amplifier in order to couple the first and the second amplified signals, thereby reducing a DC offset of a differential voltage output by the first and the second differential output terminals; and a switch to receive a differential local oscillation signal to shift the first and the second amplified signals up to frequencies associated with the local oscillation signal.

摘要翻译： 一种具有高载波抑制的上变频混频系统，其包括第一和第二LPF以滤除第一和第二输入信号，从而分别产生第一和第二滤波信号; 第一放大器，用于放大第一输入信号和第一滤波信号，从而产生第一放大信号; 第二放大器，用于放大第二输入信号和第二滤波信号从而产生第二放大信号，其中第二放大器与第一放大器交叉耦合，以耦合第一和第二放大信号，从而减少DC 由第一差分输出端子和第二差分输出端子输出的差分电压的偏移; 以及接收差分本地振荡信号以将第一和第二放大信号移动到与本地振荡信号相关联的频率的开关。

公开(公告)号：US20060244477A1

公开(公告)日：2006-11-02

申请号：US11407941

申请日：2006-04-21

申请人： Yao-Chi Wang ,  Ying-Tang Chang ,  Ching-Wen Pan ,  Chin-Pin Yu

发明人： Yao-Chi Wang ,  Ying-Tang Chang ,  Ching-Wen Pan ,  Chin-Pin Yu

IPC分类号： H03K19/003

CPC分类号： H03K19/00361

摘要： A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is connected to the digital logic gate in order to provide a fixed voltage to the digital logic gate to thus reduce an output voltage swing of the digital logic gate. The current-limited circuit is connected to the digital logic gate in order to provide a fixed current to the digital logic gate to thus reduce a transient current of the digital logic gate. Accordingly, an electromagnetic interface (EMI) caused by switching of the digital logic gate is reduced with the reduced output voltage swing and transient current.

摘要翻译： 具有低电磁干扰的逻辑器件。 逻辑器件包括数字逻辑门，电压限制电路和限流电路。 数字逻辑门提供相应的数字逻辑功能。 电压限制电路连接到数字逻辑门，以便向数字逻辑门提供固定电压，从而降低数字逻辑门的输出电压摆幅。 电流限制电路连接到数字逻辑门，以便向数字逻辑门提供固定电流，从而减少数字逻辑门的瞬态电流。 因此，由于数字逻辑门的切换引起的电磁接口（EMI）随着输出电压摆幅和瞬态电流的降低而降低。

公开(公告)号：US20060208792A1

公开(公告)日：2006-09-21

申请号：US11365514

申请日：2006-03-02

申请人： Yao-Chi Wang ,  Ying-Tang Chang

发明人： Yao-Chi Wang ,  Ying-Tang Chang

IPC分类号： H03F3/45

CPC分类号： H03F3/45968 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45744 ,  H03F2200/294 ,  H03F2200/372

摘要： An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.

摘要翻译： 一种能够降低基带信号中具有第一和第二差分输出端，第一和第二低通滤波器以及第一和第二放大器的DC偏移的放大系统。 第一低通滤波器对第一输入信号进行滤波，从而产生第一滤波信号。 第一放大器放大第一输入信号和第一滤波信号，从而产生第一放大信号。 第二低通滤波器对第二输入信号进行滤波，从而产生第二滤波信号。 第二放大器放大第二输入信号和第二滤波信号，从而产生第二放大信号。 该系统在第一和第二差分输出端耦合第一和第二放大信号，从而减小由第一和第二差分输出端输出的差分电压信号的直流偏移。

公开(公告)号：US20150365058A1

公开(公告)日：2015-12-17

申请号：US14302428

申请日：2014-06-12

申请人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

发明人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

IPC分类号： H03F3/21 ,  H03F3/45 ,  H03F3/19

CPC分类号： H03F3/211 ,  H03F1/223 ,  H03F3/19 ,  H03F3/193 ,  H03F3/45076 ,  H03F3/45188 ,  H03F2200/451 ,  H03F2203/21127 ,  H03F2203/45116 ,  H03F2203/45352

摘要： A power amplifier is provided. The power amplifier comprises a plurality of power amplifier units and a bias unit. The power amplifier units are connected in parallel with each other to receive a differential input signal. The power amplifier units perform a power amplifying so as to output a differential output signal. The bias unit is coupled to the power amplifier units and supplies a plurality of bias signals to the power amplifier units respectively. At least two of the power amplifier units are enable to operate in different class regions in according with the corresponding bias signals.

摘要翻译： 提供功率放大器。 功率放大器包括多个功率放大器单元和偏置单元。 功率放大器单元彼此并联连接以接收差分输入信号。 功率放大器单元执行功率放大以输出差分输出信号。 偏置单元耦合到功率放大器单元并且分别向功率放大器单元提供多个偏置信号。 至少两个功率放大器单元能够根据相应的偏置信号在不同的等级区域中工作。

公开(公告)号：US20140120856A1

公开(公告)日：2014-05-01

申请号：US13941546

申请日：2013-07-15

申请人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

发明人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

IPC分类号： H03G3/30 ,  H03F3/193

CPC分类号： H03F3/193 ,  H03F3/45188

摘要： A RF front-end circuit and a low noise amplifier thereof configured for a receiver are provided. The circuit includes a low noise amplifier and a quadrature passive mixer. The low noise amplifier provides two RF output differential signals to the quadrature passive mixer. The RF signals are down-converted to the differential in-phase baseband signals and the differential quadrature-phase baseband signals. The structure of the RF front-end circuit can avoid the signal and noise interfering between in-phase channel and quadrature-phase channel without using a 25% duty cycle local oscillation generator circuit.

摘要翻译： 提供了一种用于接收器的RF前端电路及其低噪声放大器。 该电路包括一个低噪声放大器和一个正交无源混频器。 低噪声放大器为正交无源混频器提供两个RF输出差分信号。 RF信号被下变频到差分同相基带信号和差分正交相位基带信号。 RF前端电路的结构可以避免同相信道和正交相位信道之间的信号和噪声干扰，而不使用25％的占空比本地振荡发生器电路。

公开(公告)号：US20090256635A1

公开(公告)日：2009-10-15

申请号：US12102082

申请日：2008-04-14

申请人： Yan Tong ,  Ying-Tang Chang

发明人： Yan Tong ,  Ying-Tang Chang

IPC分类号： H03F3/45 ,  H03G3/00

CPC分类号： H03G7/06

摘要： A variable gain amplifier (VGA) with a gain thereof exponential to a control voltage thereof. The variable gain amplifier (VGA) comprises an exponential DC converter, and a linear voltage multiplier. The exponential DC converter receives the control voltage and generates an exponential voltage which is exponential to the control voltage. The linear voltage multiplier is coupled to the exponential DC converter and has a gain proportional to the exponential voltage of the exponential DC converter.

摘要翻译： 一种可变增益放大器（VGA），其增益指向其控制电压。 可变增益放大器（VGA）包括指数DC转换器和线性电压倍增器。 指数DC转换器接收控制电压并产生指向控制电压指数的指数电压。 线性电压倍增器耦合到指数DC转换器，并且具有与指数DC转换器的指数电压成比例的增益。

公开(公告)号：US09306515B2

公开(公告)日：2016-04-05

申请号：US14302428

申请日：2014-06-12

申请人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

发明人： Hua-Yu Liao ,  Cheng-Yu Wang ,  Ying-Tang Chang

IPC分类号： H03F3/45 ,  H03F3/68 ,  H03F3/21 ,  H03F3/19

CPC分类号： H03F3/211 ,  H03F1/223 ,  H03F3/19 ,  H03F3/193 ,  H03F3/45076 ,  H03F3/45188 ,  H03F2200/451 ,  H03F2203/21127 ,  H03F2203/45116 ,  H03F2203/45352

摘要： A power amplifier is provided. The power amplifier comprises a plurality of power amplifier units and a bias unit. The power amplifier units are connected in parallel with each other to receive a differential input signal. The power amplifier units perform a power amplifying so as to output a differential output signal. The bias unit is coupled to the power amplifier units and supplies a plurality of bias signals to the power amplifier units respectively. At least two of the power amplifier units are enable to operate in different class regions in according with the corresponding bias signals.

摘要翻译： 提供功率放大器。 功率放大器包括多个功率放大器单元和偏置单元。 功率放大器单元彼此并联连接以接收差分输入信号。 功率放大器单元执行功率放大以输出差分输出信号。 偏置单元耦合到功率放大器单元并且分别向功率放大器单元提供多个偏置信号。 至少两个功率放大器单元能够根据相应的偏置信号在不同的等级区域中工作。