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公开(公告)号：US20210167084A1
公开(公告)日：2021-06-03
申请号：US17148551
申请日：2021-01-13
发明人： Qingqing Wang , Wei Xu , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L23/528 , H01L27/1157 , H01L27/11565
摘要： A method for forming a three-dimensional (3D) memory device includes forming a cut structure in a stack structure. The stack structure includes interleaved a plurality of initial sacrificial layers and a plurality of initial insulating layers. The method also includes removing portions of the stack structure adjacent to the cut structure to form a slit structure and an initial support structure. The initial support structure divides the slit structure into a plurality of slit openings. The method further includes forming a plurality of conductor portions in the initial support structure through the plurality of slit openings. The method also includes forming a source contact in each of the plurality of slit openings. The method also includes removing portions of the initial support structure to form a support structure. The support structure includes an adhesion portion extending through the support structure. In addition, the method includes forming an adhesion layer over the source contact in each of the plurality of slit openings. At least two adhesion layers are conductively connected to the adhesion portion extending through the support structure.
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公开(公告)号：US11094713B2
公开(公告)日：2021-08-17
申请号：US16689513
申请日：2019-11-20
发明人： Qingqing Wang , Wei Xu , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L27/11565 , H01L27/1157 , H01L23/528
摘要： A three-dimensional (3D) memory device includes a memory stack over a substrate. The memory stack includes interleaved conductor layers and insulating layers. The 3D memory device also includes channel structures extending vertically in the memory stack. The 3D memory device further includes a source structure extending in the memory stack. The source structure includes first and second source contacts separated by a support structure. The source structure also includes an adhesion layer. At least a portion of the adhesion layer is between the first and second source contacts and conductively connects the first and second source contacts.
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公开(公告)号：US12021030B2
公开(公告)日：2024-06-25
申请号：US17219949
申请日：2021-04-01
发明人： Wei Xu , Qingqing Wang , Jinxing Chen , Guanglong Fan , Huichao Liu
IPC分类号： H01L23/535 , H01L21/3105 , H01L21/768 , H01L27/00 , H10B43/27
CPC分类号： H01L23/535 , H01L21/31053 , H01L21/76805 , H01L21/76819 , H01L21/76895 , H10B43/27
摘要： Aspects of the disclosure provide a semiconductor device. The semiconductor device can include a trench formed in a first dielectric layer, a trench filler layer that fills a portion of the trench, a conductive layer over the trench filler layer, and a second dielectric layer over the conductive layer. The second dielectric layer is disposed in the trench. The semiconductor device can also include a contact structure configured to connect to the conductive layer through a hole in the second dielectric layer.
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公开(公告)号：US20210066336A1
公开(公告)日：2021-03-04
申请号：US16689513
申请日：2019-11-20
发明人： Qingqing Wang , Wei Xu , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L23/528 , H01L27/1157 , H01L27/11565
摘要： A three-dimensional (3D) memory device includes a memory stack over a substrate. The memory stack includes interleaved conductor layers and insulating layers. The 3D memory device also includes channel structures extending vertically in the memory stack. The 3D memory device further includes a source structure extending in the memory stack. The source structure includes first and second source contacts separated by a support structure. The source structure also includes an adhesion layer. At least a portion of the adhesion layer is between the first and second source contacts and conductively connects the first and second source contacts.
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公开(公告)号：US12058864B2
公开(公告)日：2024-08-06
申请号：US17018155
申请日：2020-09-11
发明人： Qingqing Wang , Wei Xu , Wenbin Zhou
IPC分类号： H10B43/50 , H01L21/768 , H01L23/535 , H10B41/27 , H10B41/50 , H10B43/10 , H10B43/27 , H10B43/30
CPC分类号： H10B43/50 , H01L21/76805 , H01L21/76895 , H01L23/535 , H10B41/27 , H10B41/50 , H10B43/27
摘要： A method for forming a 3D memory device is disclosed. The method includes forming an alternating dielectric stack on a substrate. Then a plurality of channel structures and dummy channel structures vertically penetrating the alternating dielectric stack are formed, The channel structures are located in a core region, and the dummy channel structures are located in a staircase region. A gate line silt structure is formed vertically penetrating the alternating dielectric stack and laterally extending in a first direction. The gate line silt structure includes a narrow portion that has a reduced width along a second direction different from the first direction.
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公开(公告)号：US11758723B2
公开(公告)日：2023-09-12
申请号：US17148551
申请日：2021-01-13
发明人： Qingqing Wang , Wei Xu , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou
IPC分类号： H10B43/27 , H01L23/528 , H10B43/10 , H10B43/35
CPC分类号： H10B43/27 , H01L23/5283 , H10B43/10 , H10B43/35
摘要： A method for forming a three-dimensional (3D) memory device includes forming a cut structure in a stack structure. The stack structure includes interleaved a plurality of initial sacrificial layers and a plurality of initial insulating layers. The method also includes removing portions of the stack structure adjacent to the cut structure to form a slit structure and an initial support structure. The initial support structure divides the slit structure into a plurality of slit openings. The method further includes forming a plurality of conductor portions in the initial support structure through the plurality of slit openings. The method also includes forming a source contact in each of the plurality of slit openings. The method also includes removing portions of the initial support structure to form a support structure. The support structure includes an adhesion portion extending through the support structure. In addition, the method includes forming an adhesion layer over the source contact in each of the plurality of slit openings. At least two adhesion layers are conductively connected to the adhesion portion extending through the support structure.
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公开(公告)号：US20230140992A1
公开(公告)日：2023-05-11
申请号：US18090416
申请日：2022-12-28
发明人： Qingqing Wang , Jianlu Wang , Wei Xu , Ming Zeng
摘要： The present disclosure relates to a three-dimensional memory and a manufacturing method thereof. The three-dimensional memory includes: a stack structure comprising a plurality of alternately stacked gate layers and dielectric layers; a plurality of channel structures vertically penetrating the stack structure; a first gate line slit structure extending along a first horizontal direction and dividing the plurality of channel structures into two memory blocks, wherein the first gate line slit structure is partitioned by a plurality of first isolation regions into a plurality of first gate line slit sub-structures; and a plurality of first connection structures each connecting, along the first horizontal direction, adjacent first gate line slit sub-structures partitioned by one first isolation region.
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