公开(公告)号：US20180041232A1

公开(公告)日：2018-02-08

申请号：US15227853

申请日：2016-08-03

Applicant: Xilinx, Inc.

Inventor： Siok Wei Lim ,  Kok Lim Chan ,  Kee Hian Tan ,  Hongyuan Zhao ,  Chin Yang Koay ,  Yohan Frans ,  Kun-Yung Chang

IPC: H04B1/04 ,  H03M9/00 ,  H02M3/158 ,  H03K17/687

CPC classification number: H04B1/04 ,  H02M3/158 ,  H03K17/163 ,  H03K17/6872 ,  H03K19/0175 ,  H03M9/00

Abstract: A driver circuit includes a plurality of output circuits coupled in parallel between a differential input and a differential output and having a first common node and a second common node. Each of the plurality of output circuits includes a series combination of a pair of inverters and a pair of resistors, coupled between the differential input and the differential output; first source terminals of the pair of inverters coupled to the first common node; and second source terminals of the pair of inverters coupled to the second common node. The driver circuit further includes a first voltage regulator having an output coupled to the first common node of the plurality of output circuits; a second voltage regulator having an output coupled to the second common node of the plurality of circuits; and a current compensation circuit coupled between the outputs of the first voltage regulator and the second voltage regulator.

公开(公告)号：US10419067B1

公开(公告)日：2019-09-17

申请号：US16107712

申请日：2018-08-21

Applicant: Xilinx, Inc.

Inventor： Chin Yang Koay ,  Hongyuan Zhao ,  Siok Wei Lim ,  Kee Hian Tan

IPC: H04B3/20 ,  H04L7/027 ,  H04B3/493 ,  H04L25/02

Abstract: Apparatus and associated methods relate to a programmable resistor having a resistance iteratively programmed by a calibration control loop. In an illustrative example, the calibration control loop may alternately sample the programmable resistance and a reference resistance by producing a corresponding voltage drop across the resistors. The voltage drops may, for example, be induced by the same constant current source. The calibration control loop may compare the voltage drops with a comparator, for example. In some examples, the comparator may provide a count direction signal to a logic block, generating a calibration code. The calibration code may, for example, be applied to the programmable resistor, such that the resistance of the programmable resistor iteratively approaches the resistance of the reference resistor. Various programmable resistors within a calibration control loop may, for example, substantially improve termination impedances of high-speed transmission lines and may mitigate random resistive mismatch variations.

公开(公告)号：US10033412B2

公开(公告)日：2018-07-24

申请号：US15837791

申请日：2017-12-11

Applicant: Xilinx, Inc.

Inventor： Siok Wei Lim ,  Kok Lim Chan ,  Kee Hian Tan ,  Hongyuan Zhao ,  Chin Yang Koay ,  Yohan Frans ,  Kun-Yung Chang

IPC: H03K17/687 ,  H04B1/04 ,  H03M9/00 ,  H02M3/158

Abstract: A driver circuit includes a plurality of output circuits coupled in parallel between a differential input and a differential output and having a first common node and a second common node. Each of the plurality of output circuits includes a series combination of a pair of inverters and a pair of resistors, coupled between the differential input and the differential output; first source terminals of the pair of inverters coupled to the first common node; and second source terminals of the pair of inverters coupled to the second common node. The driver circuit further includes a first voltage regulator having an output coupled to the first common node of the plurality of output circuits; a second voltage regulator having an output coupled to the second common node of the plurality of circuits; and a current compensation circuit coupled between the outputs of the first voltage regulator and the second voltage regulator.

公开(公告)号：US20180102797A1

公开(公告)日：2018-04-12

申请号：US15837791

申请日：2017-12-11

Applicant: Xilinx, Inc.

Inventor： Siok Wei Lim ,  Kok Lim Chan ,  Kee Hian Tan ,  Hongyuan Zhao ,  Chin Yang Koay ,  Yohan Frans ,  Kun-Yung Chang

IPC: H04B1/04 ,  H03M9/00 ,  H02M3/158 ,  H03K17/687

CPC classification number: H04B1/04 ,  H02M3/158 ,  H03K17/163 ,  H03K17/6872 ,  H03K19/0175 ,  H03M9/00

Abstract: A driver circuit includes a plurality of output circuits coupled in parallel between a differential input and a differential output and having a first common node and a second common node. Each of the plurality of output circuits includes a series combination of a pair of inverters and a pair of resistors, coupled between the differential input and the differential output; first source terminals of the pair of inverters coupled to the first common node; and second source terminals of the pair of inverters coupled to the second common node. The driver circuit further includes a first voltage regulator having an output coupled to the first common node of the plurality of output circuits; a second voltage regulator having an output coupled to the second common node of the plurality of circuits; and a current compensation circuit coupled between the outputs of the first voltage regulator and the second voltage regulator.

公开(公告)号：US09887710B1

公开(公告)日：2018-02-06

申请号：US15227853

申请日：2016-08-03

Applicant: Xilinx, Inc.

Inventor： Siok Wei Lim ,  Kok Lim Chan ,  Kee Hian Tan ,  Hongyuan Zhao ,  Chin Yang Koay ,  Yohan Frans ,  Kun-Yung Chang

IPC: H04B1/04 ,  H03K17/687 ,  H03M9/00 ,  H02M3/158

CPC classification number: H04B1/04 ,  H02M3/158 ,  H03K17/163 ,  H03K17/6872 ,  H03K19/0175 ,  H03M9/00

Abstract: A driver circuit includes a plurality of output circuits coupled in parallel between a differential input and a differential output and having a first common node and a second common node. Each of the plurality of output circuits includes a series combination of a pair of inverters and a pair of resistors, coupled between the differential input and the differential output; first source terminals of the pair of inverters coupled to the first common node; and second source terminals of the pair of inverters coupled to the second common node. The driver circuit further includes a first voltage regulator having an output coupled to the first common node of the plurality of output circuits; a second voltage regulator having an output coupled to the second common node of the plurality of circuits; and a current compensation circuit coupled between the outputs of the first voltage regulator and the second voltage regulator.