公开(公告)号：US20240396638A1

公开(公告)日：2024-11-28

申请号：US18202512

申请日：2023-05-26

Applicant: XILINX, INC.

Inventor： Adebabay M. BEKELE ,  Mayank RAJ ,  Chuan XIE ,  Sandeep KUMAR ,  Zhaowen WANG ,  Sukruth PATTANAGIRI GIRIYAPPA ,  Parag UPADHYAYA ,  Yohan FRANS

IPC: H04B10/54 ,  H04B10/50 ,  H04B10/508

Abstract: Some examples described herein provide for controlling output modulation amplitude for optoelectronic devices. In an example, a method includes transmitting a first data pattern to an optical modulator device. The method also includes determining, while transmitting the first data pattern and for each heater control value of a plurality of heater control values for a heater, a photodiode current value associated with the optical modulator device to generate a plurality of photodiode current values corresponding to the plurality of heater control values. The method also includes determining a maximum optical modulation amplitude for the optical modulator device based at least in part on the plurality of photodiode current values corresponding to the plurality of heater control values. The method also includes controlling the heater for the optical modulator device based on the maximum optical modulation amplitude.

公开(公告)号：US20220231889A1

公开(公告)日：2022-07-21

申请号：US17665477

申请日：2022-02-04

Applicant: XILINX, INC.

Inventor： Hongtao ZHANG ,  Winson LIN ,  Arianne ROLDAN ,  Yohan FRANS ,  Geoff ZHANG

IPC: H04L25/03 ,  H03L7/089 ,  H04L27/01

Abstract: An example method for clock and data recovery (CDR) includes generating, in a set of slicers of a receiver, in addition to a data signal and a first error signal, at least one additional error signal. The method further includes receiving, at a frequency detector (FD) of a CDR unit of the receiver, the data signal, the first error signal, and the at least one additional error signal, and processing them to generate a FD output. The method still further includes multiplying the FD output by a user-defined FD gain, and adding the FD output, as multiplied by the FD gain, in a frequency path of the CDR unit.

公开(公告)号：US20240405882A1

公开(公告)日：2024-12-05

申请号：US18205748

申请日：2023-06-05

Applicant: XILINX, INC.

Inventor： Adebabay M. BEKELE ,  Mayank RAJ ,  Chuan XIE ,  Sandeep KUMAR ,  Zhaowen WANG ,  Sukruth PATTANAGIRI GIRIYAPPA ,  Parag UPADHYAYA ,  Yohan FRANS

IPC: H04B10/54

Abstract: Some examples described herein provide for controlling output modulation amplitude for optoelectronic devices. In an example, a method includes transmitting a data pattern to an optical modulator device. The method also includes identifying, for each heater control value of a plurality of heater control values for a heater thermally coupled with the optical modulator device, an optical modulation amplitude corresponding to the heater control value based on a corresponding photodiode current value identified while transmitting the data pattern. The method also includes determining a maximum optical modulation amplitude for the optical modulator device based on a plurality of optical modulation amplitudes corresponding to the plurality of heater control values according to the identifying. The method also includes controlling the heater based at least in part on the determined maximum optical modulation amplitude that has been modified according to scaling maximum photodiode current values.

公开(公告)号：US20210159212A1

公开(公告)日：2021-05-27

申请号：US16694476

申请日：2019-11-25

Applicant: XILINX, INC.

Inventor： Jing JING ,  Shuxian WU ,  Xin X. WU ,  Yohan FRANS

IPC: H01L25/065 ,  H01L23/64 ,  H01L23/522 ,  H01L23/538 ,  H01L49/02 ,  H01L21/48 ,  H01L25/00

Abstract: Examples described herein provide for an isolation design for an inductor of a stacked integrated circuit device. An example is a multi-chip device comprising a chip stack comprising: a plurality of chips, neighboring pairs of the plurality of chips being bonded together, each chip comprising a semiconductor substrate, and a front side dielectric layer on a front side of the semiconductor substrate; an inductor disposed in a backside dielectric layer of a first chip of the plurality of chips, the backside dielectric layer being on a backside of the semiconductor substrate of the first chip opposite from the front side of the semiconductor substrate of the first chip; and an isolation wall extending from the backside dielectric layer of the first chip to the front side dielectric layer, the isolation wall comprising a through substrate via of the first chip, the isolation wall being disposed around the inductor.

公开(公告)号：US20240369864A1

公开(公告)日：2024-11-07

申请号：US18143846

申请日：2023-05-05

Applicant: XILINX, INC.

Inventor： Chuan XIE ,  Mayank RAJ ,  Anish JOSHI ,  Zakriya MOHAMMED ,  Gareeyasee SAHA ,  Parag UPADHYAYA ,  Yohan FRANS

IPC: G02F1/025 ,  G02F1/01

Abstract: A silicon-on-insulator (SOI) dense-wavelength-division-multiplexing (DWDM) device includes micro-ring modulators (MRMs) having radii under 5 micrometers. A 16-channel embodiment may provide a free spectral range of 3.2 THz, 200 GHz channel spacing, 41 GHz bandwidth, and a Q factor of 4500. PN junctions of rib ring waveguides (RWRs) may be perpendicular or parallel with a plane of the RWRs. On-chip inductive components may be used to match reactances of the PN junctions. The RWRs may be relatively wide and a rib bus waveguide may be relatively narrow (e.g., narrower than the RWRs). MRM outer slaps may be wider than inner slabs. Regions inside and outside of the RWRs, including slabs at optical coupling gaps may be doped to improve modulation efficiency. Regions of the rib bus waveguide distant from the optical coupling gaps may be undoped. Cavities may be provided below the MRMs and associated heater elements.

公开(公告)号：US20230282547A1

公开(公告)日：2023-09-07

申请号：US17688803

申请日：2022-03-07

Applicant: XILINX, INC.

Inventor： Gamal REFAI-AHMED ,  Yohan FRANS ,  Suresh RAMALINGAM

IPC: H01L23/427 ,  H01L25/16 ,  H01L23/16 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/427 ,  H01L21/4882 ,  H01L23/16 ,  H01L23/562 ,  H01L25/167

Abstract: Chip packages and methods for fabricating the same are provided which utilize a first heat spreader interfaced with a first integrated circuit (IC) die and a second heat spreader separately interfaced with a second IC die. The separate heat spreaders allow the force applied to the first IC die to be controlled independent of the force applied to the second IC die.

公开(公告)号：US20210305127A1

公开(公告)日：2021-09-30

申请号：US16833034

申请日：2020-03-27

Applicant: XILINX, INC.

Inventor： Gamal REFAI-AHMED ,  Suresh RAMALINGAM ,  Ken CHANG ,  Mayank RAJ ,  Chuan XIE ,  Yohan FRANS

IPC: H01L23/473 ,  H01L23/367 ,  H01L25/16

Abstract: Some examples described herein provide for a heterogeneous integration module (HIM) that includes a thermal management apparatus. In an example, an apparatus (e.g., a HIM) includes a wiring substrate, a first component, a second component, and a thermal management apparatus. The first component and the second component are communicatively coupled together via the wiring substrate. The thermal management apparatus is in thermal communication with the first component and the second component. The thermal management apparatus has a first thermal energy flow path for dissipating thermal energy generated by the first component and has a second thermal energy flow path for dissipating thermal energy generated by the second component. The first thermal energy flow path has a lower thermal resistivity than the second thermal energy flow path.