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公开(公告)号：US20190386039A1
公开(公告)日：2019-12-19
申请号：US15740980
申请日：2017-10-20
Inventor： Yuebai Han
IPC: H01L27/12
Abstract: The present disclosure relates to the field of display technologies, and discloses an array substrate and a display apparatus. The array substrate includes a base layer, pixel circuits and signal lines. The pixel circuits are disposed on the base layer in an array form, the signal lines are disposed on the base layer in a row direction or a column direction and coupled to the pixel circuits, and at least one of the signal lines is disposed at an outermost side of the pixel circuits disposed in the array form and at least one of the other signal lines that is disposed in a same direction with the signal line is disposed at the opposite outermost side of the pixel circuits disposed in the array form.
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公开(公告)号：US20190361305A1
公开(公告)日：2019-11-28
申请号：US16208514
申请日：2018-12-03
Inventor： Yuebai Han , Lu Cheng
IPC: G02F1/1362 , G02F1/1368 , G09G3/36
Abstract: An array substrate, a display panel, and a display are disclosed. At least one metal layer is added to make a contact with a first metal layer of an existing GOA circuit and to partially overlap with a second metal layer and/or poly-silicon layer of the existing GOA circuit in an insulated manner to form a capacitor, which means that at least one capacitor in series connection with existing capacitors is added, so that the capacitance of the GOA circuit is increased while the capacitor area of the GOA circuit is still the area of the existing capacitors, thus, facilitating the narrow-border design of LCDs.
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Patent Agency Ranking
公开(公告)号：US10347204B2
公开(公告)日：2019-07-09
申请号：US15577876
申请日：2017-10-24
Inventor： Yuebai Han
IPC: G09G3/36
Abstract: A dummy circuit and a driving circuit of a flat panel display device is provided in the present application, including: a plurality of dummy scanning lines extending in a row direction and separated from each other; a plurality of data lines extending in a column direction and separated from each other, the plurality of data lines including an outer dummy data line in the outermost side; the dummy scanning lines intersecting with the dummy data lines to form a plurality of dummy pixel regions, dummy pixel electrodes provided in the dummy pixel regions; a plurality of thin film transistors connecting the pixel electrode to the corresponding dummy scanning lines and the dummy data lines; and wherein the outer dummy data line corresponding to at least one end portion of the of the dummy scanning line outwardly avoidance disposed to make the projections of the both staggered.
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公开(公告)号：US10784286B2
公开(公告)日：2020-09-22
申请号：US15735543
申请日：2017-10-12
Inventor： Yuebai Han
Abstract: A low temperature polysilicon panel has an edge region, the edge region includes a polysilicon film layer and an interval spacer layer located above the polysilicon film layer; a row of dummy pixel units are provided on the interval spacer layer; a first conductive thin film layer is provided above the dummy pixel unit; a passivation layer is insulated between the dummy pixel unit and the first conductive thin film layer. The dummy pixel units includes a thin film transistor and a data line electrically connected thereto for accessing a common signal; a first hole provided on the interval spacer layer, and the polysilicon film layer electrically connected to the data line through the first hole. The low temperature polysilicon panel can lead the charge collected on the polysilicon film layer to avoid the edge wounded of the polysilicon panel and prevent the leakage of the polysilicon panel edge.
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公开(公告)号：US10690978B2
公开(公告)日：2020-06-23
申请号：US16208514
申请日：2018-12-03
Inventor： Yuebai Han , Lu Cheng
IPC: G02F1/1362 , G02F1/1368 , G09G3/36
Abstract: An array substrate, a display panel, and a display are disclosed. At least one metal layer is added to make a contact with a first metal layer of an existing GOA circuit and to partially overlap with a second metal layer and/or poly-silicon layer of the existing GOA circuit in an insulated manner to form a capacitor, which means that at least one capacitor in series connection with existing capacitors is added, so that the capacitance of the GOA circuit is increased while the capacitor area of the GOA circuit is still the area of the existing capacitors, thus, facilitating the narrow-border design of LCDs.
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公开(公告)号：US20180301532A1
公开(公告)日：2018-10-18
申请号：US15522841
申请日：2017-03-09
Inventor： Yuebai Han , Xiaojiang Yu
IPC: H01L29/06 , H01L29/66 , H01L29/786
Abstract: Disclosed is a thin film transistor, which includes a shading layer and a poly-silicon layer, the shading layer being arranged below the poly-silicon layer. when viewed from a top perspective, the shading layer and the poly-silicon layer have an angle therebetween, the angle being an acute angle or an obtuse angle. The thin film transistor breaks processing constrains and makes it possible to reduce the inclination degree of the poly-silicon layer at an edge of a sloping part of the shading layer in a larger range, thereby improving the conductivity of the poly-silicon layer.
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公开(公告)号：US11099440B2
公开(公告)日：2021-08-24
申请号：US16071525
申请日：2018-05-22
Inventor： Yuebai Han , Jiawei Zhang
IPC: G02F1/1362 , G02F1/1333 , G02F1/1368 , H01L27/12
Abstract: Provided are a display device and an array substrate thereof. The array substrate includes a plurality of pixel units arranged in an array, wherein each of the pixel units comprises a light shielding layer, a thin film transistor, a touch electrode, a scan line and a data line, and the scan line is disposed in a first direction, and the data line is disposed in a second direction, and the scan line crosses the data line, and the pixel unit further comprises a touch signal line, and the touch signal line is at a same layer as the scan line, and two adjacent touch signal lines in the first direction are connected with the light shielding layer, the touch signal line is connected to the light shielding layer through a first via hole, and the touch signal line is connected to the touch electrode through a second via hole.
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