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    CHECK-MATRIX GENERATING METHOD, ENCODING METHOD, COMMUNICATION APPARATUS, COMMUNICATION SYSTEM, AND ENCODER
    1.
    发明申请
    CHECK-MATRIX GENERATING METHOD, ENCODING METHOD, COMMUNICATION APPARATUS, COMMUNICATION SYSTEM, AND ENCODER 审中-公开
    检查矩阵生成方法，编码方法，通信设备，通信系统和编码器

    公开(公告)号：US20100058140A1

    公开(公告)日：2010-03-04

    申请号：US12376344

    申请日：2007-08-02

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/05 ,  G06F11/10

    CPC classification number: H03M13/1177 ,  H03M13/6508

    Abstract: A regular quasi-cyclic matrix is generated in which specific regularity is given to cyclic permutation matrices. A mask matrix capable of supporting a plurality of encoding rates is generated. A specific cyclic permutation matrix in the regular quasi-cyclic matrix is converted into a zero-matrix using a mask matrix corresponding to a specific encoding rate to generate an irregular masking quasi-cyclic matrix. An irregular parity check matrix with an LDGM structure is generated in which the masking quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

    Abstract translation: 生成规则准循环矩阵，其中给定循环置换矩阵的特定规则性。 产生能够支持多种编码速率的掩模矩阵。 使用与特定编码速率相对应的掩模矩阵将常规准循环矩阵中的特定循环置换矩阵转换为零矩阵，以生成不规则掩蔽准循环矩阵。 生成具有LDGM结构的不规则奇偶校验矩阵，其中掩蔽准循环矩阵和其中循环置换矩阵以阶梯排列的矩阵布置在预定位置。

    CHECK MATRIX GENERATING DEVICE, CHECK MATRIX GENERATING METHOD, ENCODER, TRANSMITTER, DECODER, AND RECEIVER
    2.
    发明申请
    CHECK MATRIX GENERATING DEVICE, CHECK MATRIX GENERATING METHOD, ENCODER, TRANSMITTER, DECODER, AND RECEIVER 有权
    检查矩阵生成装置，检查矩阵生成方法，编码器，发射器，解码器和接收器

    公开(公告)号：US20100211846A1

    公开(公告)日：2010-08-19

    申请号：US12667002

    申请日：2008-06-26

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/05 ,  G06F11/10

    CPC classification number: H03M13/116 ,  H03M13/118

    Abstract: When arranging J cyclic permutation matrices I(pj,l) with p rows and q columns (0≦j≦J−1, 0≦l≦L−1) in a row direction and also arranging L cyclic permutation matrices I(pj,l) in a column direction so as to generate a regular quasi-cyclic matrix having uniform row and column weights, a quasi-cyclic matrix generating unit 31 configures the regular quasi-cyclic matrix by combining cyclic permutation matrices I(pj,l) in each of which matrix elements whose row number is r (0≦r≦p−1) and whose column number is (r+pj,l) mod p are “1”s, and other matrix elements are “0”s in such a way that a plurality of cyclic permutation matrices I(pj,l) arranged at, e.g., the 1st row differ from one another.

    Abstract translation: 当在行方向上布置具有p行和q列（0＆nlE; j＆nlE; J-1,0＆nlE; l＆nlE; L-1）的J个循环置换矩阵I（pj，l）时，并且还排列L个循环置换矩阵I（pj， 1）在列方向上，以便产生具有均匀行和列权重的规则准循环矩阵，准循环矩阵生成单元31通过将循环置换矩阵I（pj，l）组合在一起，构成规则准循环矩阵 其行号为r（0＆nlE; r＆nlE; p-1）并且列数为（r + pj，l）mod p的矩阵元素中的每一个为“1”，其他矩阵元素为“0” 布置在例如第一行的多个循环置换矩阵I（pj，l）彼此不同的方式。

    INSPECTION MATRIX GENERATION METHOD, ENCODING METHOD, COMMUNICATION DEVICE, COMMUNICATION SYSTEM, AND ENCODER
    3.
    发明申请
    INSPECTION MATRIX GENERATION METHOD, ENCODING METHOD, COMMUNICATION DEVICE, COMMUNICATION SYSTEM, AND ENCODER 有权
    检查矩阵生成方法，编码方法，通信设备，通信系统和编码器

    公开(公告)号：US20090164864A1

    公开(公告)日：2009-06-25

    申请号：US12097390

    申请日：2006-12-13

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/05 ,  G06F11/10

    CPC classification number: H03M13/116 ,  H03M13/118 ,  H03M13/1185

    Abstract: A regular qc matrix is generated in which cyclic permutation matrices with specific regularity are arranged in row and column directions. A mask matrix supporting multiple encoding rates is generated for making the regular qc matrix into irregular. A specific cyclic permutation matrix in the regular qc matrix is converted into a zero-matrix using a mask matrix corresponding to a specific encoding rate to generate an irregular masking qc matrix. An irregular parity check matrix with a LDGM structure is generated, in which the masking qc matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

    Abstract translation: 生成常规的qc矩阵，其中具有特定规则性的循环置换矩阵被排列在行和列方向上。 生成支持多个编码率的掩码矩阵，使常规的qc矩阵变为不规则的。 使用对应于特定编码率的掩码矩阵将常规qc矩阵中的特定循环置换矩阵转换为零矩阵以生成不规则掩蔽qc矩阵。 生成具有LDGM结构的不规则奇偶校验矩阵，其中掩蔽qc矩阵和其中循环置换矩阵以阶梯排列的矩阵排列在预定位置。

    Decoding apparatus and communications apparatus
    4.
    发明授权
    Decoding apparatus and communications apparatus 有权
    解码装置和通信装置

    公开(公告)号：US08201047B2

    公开(公告)日：2012-06-12

    申请号：US11791996

    申请日：2005-12-01

    Applicant: Rui Sakai ,  Wataru Matsumoto ,  Yoshikuni Miyata ,  Hideo Yoshida ,  Takahiko Nakamura

    Inventor： Rui Sakai ,  Wataru Matsumoto ,  Yoshikuni Miyata ,  Hideo Yoshida ,  Takahiko Nakamura

    IPC: H03M13/00

    CPC classification number: H03M13/1188 ,  H03M13/1117 ,  H03M13/112 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/118 ,  H03M13/1185 ,  H03M13/3911 ,  H03M13/6583 ,  H04L1/005 ,  H04L1/0057

    Abstract: A decoding apparatus includes a row processing unit 5 and a column processing unit 6 for performing a calculation and an update of probability information with row processing and column processing according to a Min-Sum algorithm on a received signal which is low-density parity-check coded in batches of 1 bit or a predetermined number of bits, a decoded result judgment unit 8 for determining a decoded result from a hard decision of a posterior value, for performing a parity check on the decoded result, and for judging whether or not the decoded result is correct, and a control unit for controlling iteration of decoding processing by the row processing unit 5 and column processing unit 6 on the basis of the judgment result of the decoded result judgment unit 8.

    Abstract translation: 解码装置包括：行处理单元5和列处理单元6，用于对接收到的信号进行低密度奇偶校验，根据最小和算法对行处理和列处理进行概率信息的计算和更新 以1比特或预定比特数的批次编码的解码结果判断单元8，用于从后验值的硬判定中确定解码结果，用于对解码结果进行奇偶校验，并判断是否 解码结果是正确的，以及控制单元，用于根据解码结果判断单元8的判断结果控制行处理单元5和列处理单元6的解码处理的迭代。

    Check matrix generating device, check matrix generating method, encoder, transmitter, decoder, and receiver
    5.
    发明授权
    Check matrix generating device, check matrix generating method, encoder, transmitter, decoder, and receiver 有权
    检查矩阵生成装置，校验矩阵生成方法，编码器，发送器，解码器和接收器

    公开(公告)号：US08196014B2

    公开(公告)日：2012-06-05

    申请号：US12667002

    申请日：2008-06-26

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/00

    CPC classification number: H03M13/116 ,  H03M13/118

    Abstract: When arranging J cyclic permutation matrices I(pj,l) with p rows and q columns (0≦j≦J−1, 0≦l≦L−1) in a row direction and also arranging L cyclic permutation matrices I(pj,l) in a column direction so as to generate a regular quasi-cyclic matrix having uniform row and column weights, a quasi-cyclic matrix generating unit 31 configures the regular quasi-cyclic matrix by combining cyclic permutation matrices I(pj,l) in each of which matrix elements whose row number is r (0≦r≦p−1) and whose column number is (r+pj,l) mod p are “1”s, and other matrix elements are “0”s in such a way that a plurality of cyclic permutation matrices I(pj,l) arranged at, e.g., the 1st row differ from one another.

    Abstract translation: 当在行方向上布置具有p行和q列（0＆nlE; j＆nlE; J-1,0＆nlE; l＆nlE; L-1）的J个循环置换矩阵I（pj，l）时，并且还排列L个循环置换矩阵I（pj， 1）在列方向上，以便产生具有均匀行和列权重的规则准循环矩阵，准循环矩阵生成单元31通过将循环置换矩阵I（pj，l）组合在一起，构成规则准循环矩阵 其行号为r（0＆nlE; r＆nlE; p-1）并且列数为（r + pj，l）mod p的矩阵元素中的每一个为“1”，其他矩阵元素为“0” 布置在例如第一行的多个循环置换矩阵I（pj，l）彼此不同的方式。

    Communication apparatus and decoding method
    6.
    发明授权
    Communication apparatus and decoding method 有权
    通信设备和解码方法

    公开(公告)号：US08132080B2

    公开(公告)日：2012-03-06

    申请号：US11988565

    申请日：2006-07-12

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida ,  Yoshikuni Miyata

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida ,  Yoshikuni Miyata

    IPC: H03M13/45

    CPC classification number: H03M13/1122 ,  H03M13/1117 ,  H03M13/112 ,  H03M13/6561 ,  H03M13/658 ,  H03M13/6583

    Abstract: A communication apparatus includes a storage unit, a row processing unit, and a column processing unit. The row processing unit repeatedly performs row processing to calculate a column-processing LLR for each column and each row in a check matrix. The column processing unit calculates a row-processing LLR for each column and each row of the check matrix, and repeatedly performs column processing to store in the storage unit the minimum value k of absolute values of the row-processing LLR. The row processing unit and the column processing unit alternately performs their processing. The row processing unit performs calculation using an approximate minimum value while the column processing unit cyclically updates the minimum k value of each row.

    Abstract translation: 通信装置包括存储单元，行处理单元和列处理单元。 行处理单元重复执行行处理，以计算校验矩阵中的每列和每行的列处理LLR。 列处理单元针对每个列和校验矩阵的每一行计算行处理LLR，并且重复执行列处理，以在存储单元中存储行处理LLR的绝对值的最小值k。 行处理单元和列处理单元交替执行其处理。 行处理单元使用近似最小值执行计算，而列处理单元循环地更新每行的最小k值。

    CHECK MATRIX GENERATING METHOD, ENCODING METHOD, DECODING METHOD, COMMUNICATION DEVICE, ENCODER, AND DECODER
    9.
    发明申请
    CHECK MATRIX GENERATING METHOD, ENCODING METHOD, DECODING METHOD, COMMUNICATION DEVICE, ENCODER, AND DECODER 审中-公开
    检查矩阵生成方法，编码方法，解码方法，通信设备，编码器和解码器

    公开(公告)号：US20090063930A1

    公开(公告)日：2009-03-05

    申请号：US12278185

    申请日：2007-01-31

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/03 ,  G06F11/10

    CPC classification number: H03M13/116 ,  H03M13/1102 ,  H03M13/118

    Abstract: A regular quasi-cyclic matrix is generated with cyclic permutation matrices and specific regularity given to the cyclic permutation matrices. A mask matrix for making the regular quasi-cyclic matrix into an irregular quasi-cyclic matrix is generated. An irregular masked quasi-cyclic matrix is generated by converting a specific cyclic permutation matrix in the regular quasi-cyclic matrix into a zero-matrix using a mask matrix supporting a specific encoding rate. An irregular parity check matrix with an LDGM structure is generated with a masked quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner.

    Abstract translation: 生成具有循环置换矩阵和赋予循环置换矩阵的特定规则性的规则准循环矩阵。 产生用于使正规准循环矩阵成为不规则准循环矩阵的掩模矩阵。 通过使用支持特定编码速率的掩码矩阵将常规准循环矩阵中的特定循环置换矩阵转换为零矩阵来生成不规则掩蔽准循环矩阵。 生成具有LDGM结构的不规则奇偶校验矩阵，其具有掩蔽的准循环矩阵和其中循环置换矩阵以阶梯状排列的矩阵。

    Error correction coding apparatus
    10.
    发明申请
    Error correction coding apparatus 有权
    纠错编码装置

    公开(公告)号：US20090031186A1

    公开(公告)日：2009-01-29

    申请号：US11886995

    申请日：2006-03-30

    Applicant: Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    Inventor： Wataru Matsumoto ,  Rui Sakai ,  Hideo Yoshida

    IPC: H03M13/11 ,  G06F11/10

    CPC classification number: H03M13/1102 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/373

    Abstract: An error correction coding apparatus is disposed to generate a low-density parity-check code 16 from an input information sequence 15 by using a low-density parity-check matrix which satisfies a predetermined weight distribution, and includes a low-density parity-check matrix output means 13 for forming the above-mentioned low-density parity-check matrix by continuously arranging a number of rows in each of which the same number of cyclic-permutation matrices as the row weight are arranged, the number of rows satisfying the above-mentioned predetermined weight distribution, and then gradually increasing or decreasing the row weight, and for outputting the above-mentioned low-density parity-check matrix.

    Abstract translation: 纠错编码装置被配置为通过使用满足预定权重分布的低密度奇偶校验矩阵从输入信息序列15生成低密度奇偶校验码16，并且包括低密度奇偶校验码 矩阵输出装置13，用于通过连续排列排列与行重量相同数目的循环置换矩阵的行数，形成上述低密度奇偶校验矩阵，满足上述数量的行数 然后逐渐增加或减少行权重，并输出上述低密度奇偶校验矩阵。

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