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公开(公告)号:US20210408082A1
公开(公告)日:2021-12-30
申请号:US16756350
申请日:2019-11-15
Inventor: Juncheng XIAO , Chao TIAN , Yanqing GUAN , Haiming CAO
IPC: H01L27/12
Abstract: The present invention provides an array substrate, a manufacturing method thereof, and a display panel. Orthographic projections of channel layers of two types of thin film transistors in a design of a driving circuit on the array substrate at least partially overlap, that is, two thin film transistors are stacked on top of each other, thereby facilitating a narrow border design of the display panel. In addition, a channel layer of one of the thin film transistors is an amorphous oxide semiconductor layer, which can reduce node leakage in the driving circuit, which is conducive to improving circuit stability and reducing power consumption.
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公开(公告)号:US20190130858A1
公开(公告)日:2019-05-02
申请号:US15969129
申请日:2018-05-02
Inventor: Juncheng XIAO , Ronglei DAI
IPC: G09G3/36 , H03K17/687
Abstract: A gate driving circuit provided in the disclosure comprises a pull-up control module configured to generate a first control signal when power is turned off, a pull-up output module configured to output a high potential under control of the first control signal, a pull-down control module configured to generate a second control signal when power is turned off, and a pull-down output module configured to output a low potential under control of the second control signal. Wherein, the output terminals of the pull-up output module and the pull-down output module are connected to the output terminal of a Nth-stage gate driving unit, and, when power is turned off, the pull-up output module and the pull-down output module together make the output terminal of the Nth-stage gate driving unit output the high potential. The image remained on the liquid crystal screen when power is turned off suddenly is cleaned quickly thereby.
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公开(公告)号:US20180341134A1
公开(公告)日:2018-11-29
申请号:US16055237
申请日:2018-08-06
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO
IPC: G02F1/1339 , G02F1/1368 , H01L21/02 , H01L21/04 , H01L29/786 , G02F1/01 , G02F1/1362
CPC classification number: G02F1/1339 , G02F1/0107 , G02F1/1368 , G02F2001/13396 , G02F2001/13398 , G02F2001/136231 , G02F2001/13685 , G02F2201/501 , H01L21/02123 , H01L21/02225 , H01L21/0425 , H01L29/458 , H01L29/66757 , H01L29/786 , H01L29/78621 , H01L29/78675
Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer. When a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current; and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that contact regions formed of the controllable resistance spacer layers are respectively connected with the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.
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公开(公告)号:US20180053483A1
公开(公告)日:2018-02-22
申请号:US15802951
申请日:2017-11-03
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Mang ZHAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2330/04
Abstract: A GOA circuit and a liquid crystal device (LCD) are disclosed. The GOA circuit includes a plurality of GOA units and a control module. Each of the cascaded GOA units is configured for charging corresponding horizontal scanning lines within a display area when being driven by a first level clock, a second level clock, a first control clock, and a second control clock. After the horizontal scanning lines are fully charged by the GOA circuit, the control module is configured for resetting the gate driving signals to be at the first level, i.e., the invalid level, via the turn-on pulse signals and the negative-voltage constant-voltage source.
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公开(公告)号:US20180053481A1
公开(公告)日:2018-02-22
申请号:US15802865
申请日:2017-11-03
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Mang ZHAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2330/04
Abstract: A GOA circuit and a liquid crystal device (LCD) are disclosed. The GOA circuit includes a plurality of GOA units and a control module. Each of the cascaded GOA units is configured for charging corresponding horizontal scanning lines within a display area when being driven by a first level clock, a second level clock, a first control clock, and a second control clock. After the horizontal scanning lines are fully charged by the GOA circuit, the control module is configured for resetting the gate driving signals to be at the first level, i.e., the invalid level, via the turn-on pulse signals and the negative-voltage constant-voltage source.
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公开(公告)号:US20170193956A1
公开(公告)日:2017-07-06
申请号:US14891646
申请日:2015-10-21
Applicant: Shenzhen china Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Mang ZHAO
IPC: G09G3/36 , G02F1/1362 , G02F1/1368 , G02F1/1335
CPC classification number: G09G3/3696 , G02F1/133514 , G02F1/136204 , G02F1/1368 , G02F2202/22 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/04 , G11C19/184
Abstract: The invention disclosure a GOA circuit and a liquid crystal display. The GOA circuit including an electrical potential pull-down controlling circuit and a plurality of GOA sub circuits in cascade connection, the electrical potential pull-down controlling circuit comprising a first voltage limited transistor, a second filter transistor and a third transistor. The first voltage limited transistor, and the second filter transistor a reconnected in series and between the output terminal of the initial scanning signal, STV signal and the control terminal of the third transistor, the control terminal of the first voltage limited transistor and the first terminal of the third transistor is connected to the first power terminal and the second terminal of the third transistor is connected to the GOA sub circuit. By this design, the damage from the large static electricity to the GOA sub circuit can be avoided.
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公开(公告)号:US20170186878A1
公开(公告)日:2017-06-29
申请号:US14890698
申请日:2015-10-21
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Mang ZHAO
IPC: H01L29/786 , H01L25/065 , G03F1/22 , H01L29/417
CPC classification number: H01L29/78621 , G03F1/22 , H01L25/0655 , H01L29/41733 , H01L29/66765 , H01L29/78624 , H01L29/78678 , H01L29/78696
Abstract: The disclosure provides a manufacturing method for TFT array substrate, a TFT array substrate and a display device. The manufacturing method includes following steps: in sequence, forming a gate pattern layer, a gate insulating layer, a patterned poly-silicon layer, a separation layer on s substrate, and adopting a mask to form a source pattern layer and a drain pattern layer on the separation layer by photolithography processes. The source pattern layer and the drain pattern layer are connected to the patterned poly-silicon layer. The mask blocks one side of the channel area, and the same mask is adopted to form a lightly doped area on the other side of the channel area not blocked by the mask. The disclosure may reduce production costs and has great design flexibility.
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公开(公告)号:US20170162154A1
公开(公告)日:2017-06-08
申请号:US14787033
申请日:2015-09-11
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Shangcao CAO , Juncheng XIAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0842 , G09G2310/0213 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/08 , G11C19/287
Abstract: The present invention discloses a liquid crystal display device and a GOA scanning circuit. The GOA scanning circuit includes multiple cascaded GOA circuit units, and an n-th stage GOA circuit unit includes: a forward and backward scanning module including a first thin-film transistor and a second thin-film transistor, wherein, two current path terminals of the first thin-film transistor are respectively connected with a first clock signal and a first node; two current path terminals of the second thin-film transistor are respectively connected with a second clock signal and the first node; a control terminal of the first thin-film transistor is connected with a stage-transferring signal STn−1 of a previous stage GOA circuit unit; a control terminal of the second thin-film transistor is connected with a stage-transferring signal STn+1 of a next stage GOA circuit unit.
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公开(公告)号:US20230100833A1
公开(公告)日:2023-03-30
申请号:US16975164
申请日:2020-06-30
Inventor: Juncheng XIAO , Chao TIAN , Yanqing GUAN , Yongxiang ZHOU
IPC: G06V40/13 , H03F3/04 , G06V10/147
Abstract: A fingerprint readout circuit and a display panel are disclosed. The fingerprint readout circuit includes a voltage amplifier unit, a fingerprint readout unit, and a source follower unit. The voltage amplifier unit is coupled to the fingerprint readout unit and the source follower unit, and the fingerprint readout unit is coupled to the source follower unit. The fingerprint readout circuit has both current and voltage amplification functions. Therefore, a voltage difference is amplified, facilitating reading out fingerprint signals accurately and enhancing fingerprint readout precision and accuracy.
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公开(公告)号:US20200226993A1
公开(公告)日:2020-07-16
申请号:US16342207
申请日:2018-08-16
Inventor: Xin ZHANG , Juncheng XIAO , Chao TIAN , Yanqing GUAN
IPC: G09G3/36
Abstract: A GOA circuit, a display panel and a display apparatus are provided. The GOA circuit includes: a forward/backward scanning control module configured to control, according to a forward scanning control signal or a backward scanning control signal, the GOA circuit to perform forward scanning or backward scanning, the level of an output signal from the forward/backward scanning control module being greater than a preset value; and, an output control module configured to control, according to a clock signal in a current level, the output of a gate driving signal in the current level.
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