公开(公告)号：US09875927B2

公开(公告)日：2018-01-23

申请号：US15356677

申请日：2016-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzu-Hao Fu ,  Home-Been Cheng ,  Ci-Dong Chu ,  Tsung-Yin Hsieh

IPC: H01L21/768 ,  H01L21/308 ,  H01L21/027

CPC classification number: H01L21/76816 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76877

Abstract: A method for forming patterns for semiconductor device includes following steps. A substrate including a hard mask layer and a sacrificial layer is provided. A plurality of mandrel patterns are formed on the substrate. A spacer is respectively formed on sidewalls of the mandrel patterns. The mandrel patterns are removed to form a plurality of spacer patterns directly formed on the sacrificial layer. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion of the first blocking layers are formed on the substrate. The sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers, and the second blocking layers serving as etching masks to form a patterned hard mask layer on the substrate.

公开(公告)号：US10438843B1

公开(公告)日：2019-10-08

申请号：US16119980

申请日：2018-08-31

Applicant: United Microelectronics Corp.

Inventor： Tzu-Hao Fu ,  Ci-Dong Chu ,  Tsung-Yin Hsieh ,  Chih-Sheng Chang

IPC: H01L21/70 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L21/311

Abstract: A structure of semiconductor device includes a substrate. A first dielectric layer is disposed over the substrate, wherein the first dielectric layer has an air trench. A plurality of trench metal layers is disposed in the first dielectric layer, wherein the air trench is between adjacent two of the trench metal layers and without contacting to the trench metal layers. A liner layer is disposed on the first dielectric layer to cover the trench metal layers and a profile of the air trench. An etching stop layer is disposed on the liner layer, wherein the etching stop layer seals the air trench to form an air gap between the adjacent two of the trench metal layers.

公开(公告)号：US20160351410A1

公开(公告)日：2016-12-01

申请号：US14741426

申请日：2015-06-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzu-Hao Fu ,  Home-Been Cheng ,  Ci-Dong Chu ,  Tsung-Yin Hsieh

IPC: H01L21/308 ,  H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76877

Abstract: A method for forming patterns for semiconductor device includes following steps. A substrate is provided. The substrate includes a hard mask layer and a sacrificial layer formed thereon. A plurality of spacer patterns parallel with each other are formed on the substrate. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion the first blocking layer are formed on the substrate after forming the first blocking layer. Next, the sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers and the second blocking layer being used as etching masks to form a patterned hard mask layer on the substrate.

Abstract translation: 用于形成半导体器件的图案的方法包括以下步骤。 提供基板。 基板包括硬掩模层和形成在其上的牺牲层。 在基板上形成有彼此平行的多个间隔图案。 在形成间隔物图案之后，在牺牲层中形成多个第一阻挡层。 在形成第一阻挡层之后，在衬底上形成多个第二阻挡层，暴露至少一部分牺牲层和至少一部分第一阻挡层。 接下来，用间隔物图案蚀刻牺牲层和硬掩模层，将第一阻挡层和第二阻挡层用作蚀刻掩模，以在基板上形成图案化的硬掩模层。

公开(公告)号：US20170069529A1

公开(公告)日：2017-03-09

申请号：US15356677

申请日：2016-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzu-Hao Fu ,  Home-Been Cheng ,  Ci-Dong Chu ,  Tsung-Yin Hsieh

IPC: H01L21/768 ,  H01L21/308 ,  H01L21/027

CPC classification number: H01L21/76816 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76877

Abstract: A method for forming patterns for semiconductor device includes following steps. A substrate including a hard mask layer and a sacrificial layer is provided. A plurality of mandrel patterns are formed on the substrate. A spacer is respectively formed on sidewalls of the mandrel patterns. The mandrel patterns are removed to form a plurality of spacer patterns directly formed on the sacrificial layer. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion of the first blocking layers are formed on the substrate. The sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers, and the second blocking layers serving as etching masks to form a patterned hard mask layer on the substrate.

Abstract translation: 用于形成半导体器件的图案的方法包括以下步骤。 提供了包括硬掩模层和牺牲层的基板。 在基板上形成多个心轴图案。 间隔件分别形成在心轴图案的侧壁上。 去除心轴图案以形成直接形成在牺牲层上的多个间隔图案。 在形成间隔物图案之后，在牺牲层中形成多个第一阻挡层。 在衬底上形成暴露至少一部分牺牲层和至少一部分第一阻挡层的多个第二阻挡层。 用间隔物图案，第一阻挡层和第二阻挡层用作蚀刻掩模来蚀刻牺牲层和硬掩模层，以在衬底上形成图案化的硬掩模层。

公开(公告)号：US09536751B2

公开(公告)日：2017-01-03

申请号：US14741426

申请日：2015-06-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzu-Hao Fu ,  Home-Been Cheng ,  Ci-Dong Chu ,  Tsung-Yin Hsieh

IPC: H01L21/308 ,  H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76877

Abstract: A method for forming patterns for semiconductor device includes following steps. A substrate is provided. The substrate includes a hard mask layer and a sacrificial layer formed thereon. A plurality of spacer patterns parallel with each other are formed on the substrate. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion the first blocking layer are formed on the substrate after forming the first blocking layer. Next, the sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers and the second blocking layer being used as etching masks to form a patterned hard mask layer on the substrate.

Abstract translation: 用于形成半导体器件的图案的方法包括以下步骤。 提供基板。 基板包括硬掩模层和形成在其上的牺牲层。 在基板上形成有彼此平行的多个间隔图案。 在形成间隔物图案之后，在牺牲层中形成多个第一阻挡层。 在形成第一阻挡层之后，在衬底上形成多个第二阻挡层，暴露至少一部分牺牲层和至少一部分第一阻挡层。 接下来，用间隔物图案蚀刻牺牲层和硬掩模层，将第一阻挡层和第二阻挡层用作蚀刻掩模，以在基板上形成图案化的硬掩模层。