公开(公告)号：US09922832B1

公开(公告)日：2018-03-20

申请号：US15628753

申请日：2017-06-21

申请人： UNITED MICROELECTRONICS CORP.

发明人： Xiao-Fei Han ,  Ju-Bao Zhang ,  Chao Jiang ,  Hong Liao ,  Wen-Wen Gong

IPC分类号： H01L21/28 ,  H01L29/66

CPC分类号： H01L21/28273 ,  H01L27/11521 ,  H01L27/11548 ,  H01L29/66825

摘要： A manufacturing method of a semiconductor structure is provided. The manufacturing method of the semiconductor structure includes the following steps: providing a semiconductor substrate, wherein the semiconductor substrate has a first region and a second region surrounding the first region; forming a gate stack and a dummy gate stack in the first region, wherein the dummy gate stack surrounds the gate stack; forming an oxide layer on an exterior wall and a top surface of the dummy gate stack; forming a dummy conductive layer on the gate stack, the dummy gate stack and the oxide layer, wherein the dummy conductive layer has a concave bowl-shaped top surface in the first region; and performing a chemical mechanical polishing (CMP) process on the dummy conductive layer.

公开(公告)号：US11081427B2

公开(公告)日：2021-08-03

申请号：US16998137

申请日：2020-08-20

申请人： UNITED MICROELECTRONICS CORP.

发明人： Zhao-Bing Li ,  Ju-Bao Zhang ,  Chi Ren

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L23/522 ,  H01L25/00 ,  H01L21/768 ,  H01L21/66

摘要： A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

公开(公告)号：US09524923B2

公开(公告)日：2016-12-20

申请号：US14667108

申请日：2015-03-24

申请人： UNITED MICROELECTRONICS CORP.

发明人： Xiao-Fei Han ,  Jun Qian ,  Ju-Bao Zhang

IPC分类号： H01L23/48 ,  H01L23/532 ,  H01L21/768

CPC分类号： H01L23/481 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/53238 ,  H01L23/53295 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453

摘要： A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole, an interlayer dielectric, a liner layer and a conductor. The through silicon via hole is formed in the substrate. The interlayer dielectric is formed on the substrate. The interlayer dielectric defines an opening corresponding to the through silicon via hole. The interlayer dielectric comprises a bird beak portion near the through silicon via hole. The liner layer is formed on a bottom and a sidewall of the through silicon via hole. The conductor is filled in the through silicon via hole and the opening.

摘要翻译： 提供半导体结构及其制造方法。 半导体结构包括衬底，穿硅通孔，层间电介质，衬垫层和导体。 贯穿硅通孔形成在基板中。 在基板上形成层间电介质。 层间电介质限定对应于贯穿硅通孔的开口。 层间电介质包括靠近硅通孔的鸟嘴部分。 衬垫层形成在贯通硅通孔的底部和侧壁上。 导体填充在硅通孔和开口中。

公开(公告)号：US10784185B2

公开(公告)日：2020-09-22

申请号：US16701201

申请日：2019-12-03

申请人： UNITED MICROELECTRONICS CORP.

发明人： Zhao-Bing Li ,  Ju-Bao Zhang ,  Chi Ren

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L25/065 ,  H01L21/66 ,  H01L23/00 ,  H01L25/00

摘要： A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

公开(公告)号：US10546801B2

公开(公告)日：2020-01-28

申请号：US15678541

申请日：2017-08-16

申请人： UNITED MICROELECTRONICS CORP.

发明人： Zhao-Bing Li ,  Ju-Bao Zhang ,  Chi Ren

IPC分类号： H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L25/065 ,  H01L21/66 ,  H01L23/00 ,  H01L25/00

摘要： A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.

公开(公告)号：US20160225696A1

公开(公告)日：2016-08-04

申请号：US14667108

申请日：2015-03-24

申请人： UNITED MICROELECTRONICS CORP.

发明人： Xiao-Fei Han ,  Jun Qian ,  Ju-Bao Zhang

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/481 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/53238 ,  H01L23/53295 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453

摘要： A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole, an interlayer dielectric, a liner layer and a conductor. The through silicon via hole is formed in the substrate. The interlayer dielectric is formed on the substrate. The interlayer dielectric defines an opening corresponding to the through silicon via hole. The interlayer dielectric comprises a bird beak portion near the through silicon via hole. The liner layer is formed on a bottom and a sidewall of the through silicon via hole. The conductor is filled in the through silicon via hole and the opening.

摘要翻译： 提供半导体结构及其制造方法。 半导体结构包括衬底，穿硅通孔，层间电介质，衬垫层和导体。 贯穿硅通孔形成在基板中。 在基板上形成层间电介质。 层间电介质限定对应于贯穿硅通孔的开口。 层间电介质包括靠近硅通孔的鸟嘴部分。 衬垫层形成在贯通硅通孔的底部和侧壁上。 导体填充在硅通孔和开口中。