摘要:
An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.
摘要:
With a configuration in which a first pixel electrode (17a) electrically connected to a first transistor (12) and a second pixel electrode (17b) connected to the first pixel electrode (17a) through a capacitance are provided in a single pixel, a storage capacitance wiring (18j) is formed in the same layer with a data signal line (15j), a second transistor (212c) is electrically connected to the storage capacitance wiring (18j) and to the first pixel electrode (17a), and a third transistor (212b) is electrically connected to the storage capacitance wiring (18j) and to the second pixel electrode (17b), a capacitance coupling type active matrix substrate equipped with transistors for discharge suppresses the aperture ratio reduction and load increase on gate bus lines (scan signal lines).
摘要:
Provided is an active matrix substrate including a capacitance electrode (47a) electrically connected to a pixel electrode (17a), in which a storage capacitance wiring (18p) is formed in the layer between the capacitance electrode (47a) and the pixel electrode (17a), the capacitance electrode (47a) and the storage capacitance wiring (18p) overlap through a first insulating film and the storage capacitance wiring (18p) and the pixel electrode (17a) overlap through a second insulating film. With this configuration, in the active matrix substrate, the storage capacitance value can be increased without lowering the aperture ratio.
摘要:
An active matrix substrate includes a data signal line (15x), a storage capacity wiring (18x), scan signal lines (16a, 16b), a transistor (12a) connected to the data signal line (15x) and the scan signal line (16a), a transistor (12b) connected to the storage capacity wiring (18x) and the scan signal line (16b), and pixel electrodes (17 a, 17b) formed in a pixel (101) area. The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a), and the pixel electrode (17b) is connected to the pixel electrode (17a) through a capacitor (C101) and connected to the storage capacity wiring (18x) through the transistor (12b).
摘要:
A liquid crystal display device according to the present invention includes: a plurality of pixels that are arranged in rows and columns so as to form a matrix pattern; and TFTs (TFT-A, TFT-B and TFT-C), source bus lines, gate bus lines and CS bus lines (CS-A and CS-B), which are associated with the respective pixels. Each pixel includes at least three subpixels (SP-A, SP-B and SP-C) with liquid crystal capacitors that are able to retain mutually different voltages. By supplying a signal (CS-A or CS-B) that makes two of the at least three subpixels display mutually different luminances at least at a certain grayscale tone from the source, gate and CS bus lines to each pixel, the at least three subpixels are able to display mutually different luminances.
摘要:
A first sub-pixel area and a second sub-pixel area that are provided in each of pixel areas so as to sandwich a scanning signal line 2. A first sub-pixel is arranged to include the first sub-pixel area and a section of the counter substrate which section corresponds to the first sub-pixel, area and the second sub-pixel is arranged to include the second sub-pixel area and a section of the counter substrate which section corresponds to the second sub-pixel area. A first alignment control structure is provided in the first sub-pixel and a second alignment control structure is provided in the second sub-pixel. The first alignment control structure (L1 and S1 to S4) provided in one pixel (55x) of two adjacent pixels has a shape obtained by rotating by 180° the first alignment control structure (L11, S11 to S14) provided in the other one pixel (55y) of the two adjacent pixels. This makes it possible to suppress deterioration in viewing angle characteristics caused by disordered alignment along the scanning signal line (2) in a liquid crystal panel in which a plurality of alignment domains can be formed.
摘要:
One embodiment of the present invention is to prevent deterioration of display quality from occurring in a display device provided with an active matrix substrate even when a larger size or a higher resolution is employed and a drive frequency is increased. In an active matrix substrate of a liquid crystal display device, a discharge control signal line is disposed so as to be arranged along each gate line and discharge TFTs are provided for each source line in numbers equal to the number of the gate lines. The gate terminal, source terminal, and drain terminal of the discharge TFT are connected to the discharge control signal line, the storage capacitance line, and its adjacent source line, respectively. Each storage capacitance line is provided with the common potential Vcom. Each discharge control signal line is provided with a signal which turns on the discharge TFT for a predetermined period of every one horizontal period.
摘要:
Provided is an active matrix substrate including a capacitance electrode (47a) electrically connected to a pixel electrode (17a), in which a storage capacitance wiring (18p) is formed in the layer between the capacitance electrode (47a) and the pixel electrode (17a), the capacitance electrode (47a) and the storage capacitance wiring (18p) overlap through a first insulating film and the storage capacitance wiring (18p) and the pixel electrode (17a) overlap through a second insulating film. With this configuration, in the active matrix substrate, the storage capacitance value can be increased without lowering the aperture ratio.
摘要:
In each pixel region, (i) a first pixel electrode (17a) connected to a first transistor (12a), (ii) a second pixel electrode (17b) connected to a second transistor (17b), (iii) a coupling electrode (67y), and (iv) first and second capacitor electrodes (67x and 67z) provided in a layer in which a data signal line (15) is provided, being provided, a capacitor being defined by the coupling electrode (67y) and the second pixel electrode (17b), the coupling electrode (67y) being connected to the first pixel electrode (17a) via a third transistor (112), the first capacitor electrode (67x) and a retention capacitor line (18) overlapping each other via a gate insulating film, the first capacitor electrode (67x) being connected to the first pixel electrode (17a), the second capacitor electrode (67z) and the retention capacitor line (18) overlapping each other via the gate insulating film, the second capacitor electrode (67z) being connected to the second pixel electrode (17b). This allows an increase in pixel aperture ratio of a capacitively coupled active matrix substrate having three transistors.
摘要:
Disclosed herein is a liquid crystal panel including: first and second pixel electrode (17a and 17b) in a single pixel (101); a first upper capacitor electrode (37a) connected with the first pixel electrode (17a); a second upper capacitor electrode (37b) connected with the second pixel electrode (17b); a first lower capacitor electrode (47a) that is provided in a layer in which a scanning signal line (16x) is provided and that is connected with the first pixel electrode (17a); and a second lower capacitor electrode (47b) that is provided in the layer and that is connected with the second pixel electrode (17b), the first pixel electrode (17a) being connected with a data signal line (15x) via a transistor (12a), a capacitor being formed between the first upper capacitor electrode (37a) and the second lower capacitor electrode (47b), a capacitor being formed between the second upper capacitor electrode (37b) and the first lower capacitor electrode (47a).