Semiconductor device and manufacturing method thereof

    公开(公告)号:US10304743B2

    公开(公告)日:2019-05-28

    申请号:US15262385

    申请日:2016-09-12

    Abstract: A semiconductor device according to this embodiment includes a semiconductor layer, a plurality of diffusion layers in the semiconductor layer, a gate insulating film, a gate electrode, first contacts, and second contacts. The gate insulating film is on the semiconductor layer between the plurality of diffusion layers. The gate electrode is on the gate insulating film. The first contacts include silicide layers of the same material which are on the gate electrode and the diffusion layers respectively, and first metal layers on the silicide layers. The second contacts are on the first contacts.

    Semiconductor memory device having memory cells provided in a height direction

    公开(公告)号:US09812398B2

    公开(公告)日:2017-11-07

    申请号:US14849061

    申请日:2015-09-09

    CPC classification number: H01L23/53271 H01L27/1157 H01L27/11582

    Abstract: According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string. The memory string comprises a plurality of control gate electrodes, and a semiconductor layer. The contact comprises a contact layer, the contact layer having a plate-like shape whose longer direction is a first direction parallel to the substrate, and the contact layer having its lower surface electrically connected to the one end of the semiconductor layer. Moreover, the contact layer includes a metal layer, a silicon based layer, and a second conductive layer. The metal layer includes tungsten. The silicon based layer includes a material including silicon. The second conductive layer covers side surfaces of the metal layer and the silicon based layer.

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