公开(公告)号：US20250054904A1

公开(公告)日：2025-02-13

申请号：US18797894

申请日：2024-08-08

Applicant: Tokyo Electron Limited

Inventor： Panupong JAIPAN ,  Kevin RYAN ,  Ilseok SON ,  Arkalgud SITARAM ,  Yohei YAMASHITA ,  Yasutaka MIZOMOTO ,  Yoshihiro TSUTSUMI ,  Yoshihiro KONDO

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/3205

Abstract: A method of processing a substrate that includes: forming an infrared (IR) absorbing separation layer over a first substrate; forming one or more layers over the IR absorbing separation layer; bonding the first substrate and a second substrate at a bonding interface between the one or more layers and the second substrate using a direct bonding technique to form a wafer stack; exposing the wafer stack to an infrared (IR) light irradiation to separate the first substrate from the one or more layers.

公开(公告)号：US20240250064A1

公开(公告)日：2024-07-25

申请号：US18562502

申请日：2022-05-25

Applicant: Tokyo Electron Limited

Inventor： Yoshihisa MATSUBARA ,  Yoshihiro TSUTSUMI ,  Yohei YAMASHITA

IPC: H01L23/00 ,  B32B43/00 ,  H01L23/544

CPC classification number: H01L24/96 ,  B32B43/006 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2224/96

Abstract: The substrate processing method includes processes (A) to (D). The process (A) prepares a laminated substrate including a first substrate, a first absorption layer that absorbs laser light, a second absorption layer having an absorption coefficient with respect to the laser light higher than that of the first absorption layer, a device layer, and a second substrate in this order. The process (B) irradiates the laser light with respect to the first substrate from a side opposite to the second substrate. The process (C) irradiates the laser light transmitted through the first substrate on the first absorption layer, to form a modified layer in the first absorption layer. The process (D) separates the first substrate and the second substrate from each other using the modified layer as a starting point.

公开(公告)号：US20250079166A1

公开(公告)日：2025-03-06

申请号：US18786164

申请日：2024-07-26

Applicant: Tokyo Electron Limited

Inventor： Panupong JAIPAN ,  Matthew BARON ,  Kandabara TAPILY ,  Ilseok SON ,  Arkalgud SITARAM ,  Yohei YAMASHITA ,  Yasutaka MIZOMOTO ,  Yoshihiro TSUTSUMI ,  Yoshihiro KONDO

IPC: H01L21/02 ,  H01L21/306

Abstract: Semiconductor devices and corresponding methods of manufacture are disclosed. The method includes forming a first device structure on a first substrate, a first laser liftoff layer on the first device structure, a protective layer on the first laser liftoff layer, and a second substrate on the protective layer. The method includes de-attaching, through applying radiation on the first laser liftoff layer, the protective layer from the first laser liftoff layer, with a first surface of the second substrate remaining in contact with a second surface of the protective layer. The protective layer is transparent to the radiation.

公开(公告)号：US20240413146A1

公开(公告)日：2024-12-12

申请号：US18699419

申请日：2022-10-13

Applicant: Tokyo Electron Limited

Inventor： Tetsu OHTOU ,  Kiyotaka IMAI ,  Tomonari YAMAMOTO ,  Takuo KAWAUCHI ,  Yoshihiro TSUTSUMI

IPC: H01L27/02 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088

Abstract: A method of manufacturing a semiconductor device includes forming a laminated film by laminating an N-type channel and a P-type channel on a substrate; performing patterning on the laminated film; forming a source and a drain on a front surface side; bonding a new substrate on the front surface side and removing the substrate on a back surface side; forming a source and a drain on the back surface side; and a step of forming a gate on the back surface side.

公开(公告)号：US20240079403A1

公开(公告)日：2024-03-07

申请号：US18261898

申请日：2022-01-18

Applicant: Tokyo Electron Limited

Inventor： Yoshihisa MATSUBARA ,  Yoshihiro TSUTSUMI ,  Yohei YAMASHITA

IPC: H01L25/00 ,  H01L21/304 ,  H01L21/67 ,  H01L21/683 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/304 ,  H01L21/67132 ,  H01L21/6835 ,  H01L25/0652 ,  H01L2221/68309 ,  H01L2221/68327 ,  H01L2221/68368 ,  H01L2221/68381

Abstract: A method of manufacturing a substrate with chips includes the following (A) and (B):



(A) preparing a stacked substrate, the stacked substrate including: a plurality of chips; a first substrate to which the plurality of chips are temporarily bonded; and a second substrate bonded to the first substrate via the plurality of chips; and
(B) separating the plurality of chips bonded to the first substrate and the second substrate, from the first substrate, in order to bond the plurality of chips to one surface of a third substrate including a device layer.




In this method, the first substrate, from which the plurality of chips are separated, includes alignment marks that are used to ensure alignment when the first substrate and the plurality of chips are bonded together, or that are used to measure misalignment after the first substrate and the plurality of chips are bonded together.