Method for globally adjusting spacer critical dimension using photo-active self-assembled monolayer

    公开(公告)号:US11567407B2

    公开(公告)日:2023-01-31

    申请号:US16586011

    申请日:2019-09-27

    摘要: A method of processing a substrate includes: providing structures on a surface of a substrate; depositing a self-assembled monolayer (SAM) over the structures and the substrate, the SAM being reactive to a predetermined wavelength of radiation; determining a first pattern of radiation exposure, the first pattern of radiation exposure having a spatially variable radiation intensity across the surface of the substrate and the structures; exposing the SAM to radiation according to the first pattern of radiation exposure, the SAM being configured to react with the radiation; developing the SAM with a predetermined removal fluid to remove portions of the SAM that are not protected from the predetermined fluid; and depositing a spacer material on the substrate and the structures, the spacer material being deposited at varying thicknesses based on an amount of the SAM remaining on the surface of the substrate and the structures.

    MANUFACTURING METHODS TO APPLY STRESS ENGINEERING TO SELF-ALIGNED MULTI-PATTERNING (SAMP) PROCESSES

    公开(公告)号:US20190189445A1

    公开(公告)日:2019-06-20

    申请号:US16212144

    申请日:2018-12-06

    摘要: Embodiments are disclosed for processing microelectronic workpieces to apply stress engineering to self-aligned multi-patterning (SAMP) processes. The disclosed processing methods utilize stress in a substrate in a SAMP process to improve resulting pattern parameters. Initially, a high stress film is deposited on the frontside and the backside of the substrate, and the high stress film provides biaxial stress to the substrate due to the deposition process for the high stress film. Next, a SAMP process is performed to form spacers in a spacer pattern. This spacer pattern is then transferred to underlying layers to form a patterned structure. The high stress film provides axial stress in at least one direction along a portion of the patterned structure during the pattern transfer thereby improving resulting pattern formation.

    GERMANIUM-CONTAINING SEMICONDUCTOR DEVICE AND METHOD OF FORMING
    3.
    发明申请
    GERMANIUM-CONTAINING SEMICONDUCTOR DEVICE AND METHOD OF FORMING 审中-公开
    含锗的半导体器件及其形成方法

    公开(公告)号:US20150340228A1

    公开(公告)日:2015-11-26

    申请号:US14712681

    申请日:2015-05-14

    IPC分类号: H01L21/02 H01L29/167

    摘要: A germanium-containing semiconductor device and a method for forming a germanium-containing semiconductor device are described. The method includes providing a germanium-containing substrate, depositing a silicon-containing interface layer on the germanium-containing substrate, depositing an aluminum-containing diffusion barrier layer on the silicon-containing interface layer, and depositing a high-k layer on the aluminum-containing diffusion barrier layer. The germanium-containing semiconductor device includes a germanium-containing substrate, a silicon-containing interface layer on the germanium-containing substrate, an aluminum-containing diffusion barrier layer on the silicon-containing interface layer, and a high-k layer on the aluminum-containing diffusion barrier layer.

    摘要翻译: 描述了含锗的半导体器件和用于形成含锗的半导体器件的方法。 该方法包括提供含锗衬底,在含锗衬底上沉积含硅界面层,在含硅界面层上沉积含铝扩散阻挡层,并在铝上沉积高k层 的扩散阻挡层。 含锗半导体器件包括含锗衬底,含锗衬底上的含硅界面层,含硅界面层上的含铝扩散阻挡层和铝上的高k层 的扩散阻挡层。

    Double Patterning Method of Patterning a Substrate

    公开(公告)号:US20240087892A1

    公开(公告)日:2024-03-14

    申请号:US17941331

    申请日:2022-09-09

    摘要: A method of forming a semiconductor device includes forming, over a hardmask layer and an underlying layer of a substrate, a pattern of first trenches between adjacent template lines, each of the first trenches exposing a portion of the hardmask layer, and each of the template lines including a mandrel and spacers on sidewalls of the mandrel; forming a pattern of first blocks over the pattern of the first trenches and the template lines, the first blocks dividing the first trenches to form a pattern of first stencil trenches; transferring the pattern of first stencil trenches to the hardmask layer to form a pattern of first hardmask trenches, each of the first hardmask trenches exposing a portion of the underlying layer; forming a first fill layer filling the first hardmask trenches and exposing the mandrels; selectively removing the mandrels to form second trenches, each of the second trenches exposing a portion of the hardmask layer; and forming a conformal liner in the second trenches and over a surface of the spacers, a surface of the first blocks, and a surface of the first fill layer to form third trenches.

    Multiple Patterning Processes
    5.
    发明申请

    公开(公告)号:US20210242020A1

    公开(公告)日:2021-08-05

    申请号:US16780248

    申请日:2020-02-03

    IPC分类号: H01L21/033

    摘要: A method of forming a device includes depositing a first etch mask layer over a mandrel formed using a lithography process. The method includes depositing a second etch mask layer over the first etch mask layer. The method includes, using a first anisotropic etching process, etching the first etch mask layer and the second etch mask layer to form an etch mask including the first etch mask layer and the second etch mask layer. The method includes removing the mandrel to expose an underlying surface of the layer to be patterned. The method includes, using the etch mask, forming a feature by performing a second anisotropic etching process to pattern the layer to be patterned, where during the first anisotropic etching process, the first etch mask layer etches at a first rate and the second etch mask layer etches at a second rate, and where the first rate is different from the second rate.

    Method for bottom-up formation of a film in a recessed feature

    公开(公告)号:US10580650B2

    公开(公告)日:2020-03-03

    申请号:US15484688

    申请日:2017-04-11

    摘要: Embodiments of the invention provide a substrate processing method for bottom-up formation of a film in a recessed feature. According to one embodiment, the method includes providing a substrate containing a first layer and a second layer on the first layer, the second layer having a recessed feature extending through the second layer, and depositing a non-conformal mask layer on the substrate, where the mask layer has an overhang at an opening of the recessed feature. The method further includes removing the mask layer from a bottom of the recessed feature, while maintaining at least a portion of the overhang at the opening, selectively depositing a film on the bottom of the recessed feature, and removing the mask layer overhang from the substrate. The processing steps may be repeated at least once until the film has a desired thickness in the recessed feature.

    Multiple patterning processes
    8.
    发明授权

    公开(公告)号:US11417526B2

    公开(公告)日:2022-08-16

    申请号:US16780248

    申请日:2020-02-03

    IPC分类号: H01L21/033

    摘要: A method of forming a device includes depositing a first etch mask layer over a mandrel formed using a lithography process. The method includes depositing a second etch mask layer over the first etch mask layer. The method includes, using a first anisotropic etching process, etching the first etch mask layer and the second etch mask layer to form an etch mask including the first etch mask layer and the second etch mask layer. The method includes removing the mandrel to expose an underlying surface of the layer to be patterned. The method includes, using the etch mask, forming a feature by performing a second anisotropic etching process to pattern the layer to be patterned, where during the first anisotropic etching process, the first etch mask layer etches at a first rate and the second etch mask layer etches at a second rate, and where the first rate is different from the second rate.

    LOCALIZED ETCH STOP LAYER
    9.
    发明申请

    公开(公告)号:US20210242089A1

    公开(公告)日:2021-08-05

    申请号:US16781078

    申请日:2020-02-04

    摘要: In one embodiment, a method includes providing a substrate comprising a source/drain contact region and a dummy gate, forming a first etch stop layer aligned to the source/drain contact region, where the first etch stop layer does not cover the dummy gate. The method may include forming a second etch stop layer over the first etch stop layer, the second etch stop layer covering the first etch stop layer and the dummy gate. The method may include converting the dummy gate to a metal gate. The method may include removing the second etch stop layer using a plasma etching process. The method may include removing the first etch stop layer.

    Manufacturing methods to apply stress engineering to self-aligned multi-patterning (SAMP) processes

    公开(公告)号:US10734228B2

    公开(公告)日:2020-08-04

    申请号:US16212144

    申请日:2018-12-06

    摘要: Embodiments are disclosed for processing microelectronic workpieces to apply stress engineering to self-aligned multi-patterning (SAMP) processes. The disclosed processing methods utilize stress in a substrate in a SAMP process to improve resulting pattern parameters. Initially, a high stress film is deposited on the frontside and the backside of the substrate, and the high stress film provides biaxial stress to the substrate due to the deposition process for the high stress film. Next, a SAMP process is performed to form spacers in a spacer pattern. This spacer pattern is then transferred to underlying layers to form a patterned structure. The high stress film provides axial stress in at least one direction along a portion of the patterned structure during the pattern transfer thereby improving resulting pattern formation.