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公开(公告)号:US11972942B2
公开(公告)日:2024-04-30
申请号:US17483286
申请日:2021-09-23
IPC分类号: H01L21/02
CPC分类号: H01L21/02236 , H01L21/02164 , H01L21/02255
摘要: A method of forming an integrated circuit, including first, positioning a semiconductor wafer in a processing chamber; second, exposing portions of the semiconductor wafer, including introducing a first amount of hydrogen into the processing chamber and introducing a first amount of oxygen into the processing chamber; and, third, introducing at least one of a second amount of hydrogen or a second amount of oxygen into the processing chamber, the second amount of hydrogen greater than zero and less than the first amount of hydrogen and the second amount of oxygen greater than zero and less than the first amount of oxygen.
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公开(公告)号:US10608075B2
公开(公告)日:2020-03-31
申请号:US16240194
申请日:2019-01-04
发明人: Bhaskar Srinivasan , Guru Mathur , Stephen Arlon Meisner , Shih Chang Chang , Corinne Ann Gagnet
IPC分类号: H01L49/02 , H01L27/108 , H01L29/66 , H01L27/06 , H01L29/16 , H01L21/02 , H01L21/768 , H01L21/027 , H01L21/3213 , H01L23/532 , H01L23/522 , H01L29/94
摘要: An integrated circuit includes a capacitor located over a semiconductor substrate. The capacitor includes a first conductive layer having a first lateral perimeter, and a second conductive layer having a second smaller lateral perimeter. A first dielectric layer is located between the second conductive layer and the first conductive layer. The first dielectric layer has a thinner portion having the first lateral perimeter and a thicker portion having the second lateral perimeter. An interconnect line is located over the substrate, and includes a third conductive layer that is about coplanar with and has about a same thickness as the first conductive layer. A second dielectric layer is located over the third conductive layer. The second dielectric layer is about coplanar with and has about a same thickness as the thinner portion of the first dielectric layer.
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公开(公告)号:US10177215B1
公开(公告)日:2019-01-08
申请号:US15793690
申请日:2017-10-25
发明人: Bhaskar Srinivasan , Guru Mathur , Stephen Arlon Meisner , Shih Chang Chang , Corinne Ann Gagnet
IPC分类号: H01L49/02 , H01L27/108 , H01L29/66 , H01L27/06 , H01L29/16 , H01L21/02 , H01L21/768 , H01L29/94
摘要: A microelectronic device includes a capacitor having a lower plate of interconnect metal, a capacitor dielectric layer with a lower silicon dioxide layer, a silicon oxy-nitride layer, and an upper silicon dioxide layer, and an upper plate over the capacitor dielectric layer. The silicon oxy-nitride layer has an average index of refraction of 1.85 to 1.95 at a wavelength of 248 nanometers. To form the microelectronic device, the lower silicon dioxide layer, the silicon oxy-nitride layer, and the upper silicon dioxide layer are formed in sequence over an interconnect metal layer. The upper plate is formed, leaving the lower silicon dioxide layer, the silicon oxy-nitride layer, and at least a portion of the upper silicon dioxide layer over the interconnect metal layer. An interconnect mask is formed of photoresist over the upper plate and the silicon oxy-nitride layer, using the silicon oxy-nitride layer as an anti-reflection layer.
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公开(公告)号:US20230087463A1
公开(公告)日:2023-03-23
申请号:US17483286
申请日:2021-09-23
IPC分类号: H01L21/02
摘要: A method of forming an integrated circuit, including first, positioning a semiconductor wafer in a processing chamber; second, exposing portions of the semiconductor wafer, including introducing a first amount of hydrogen into the processing chamber and introducing a first amount of oxygen into the processing chamber; and, third, introducing at least one of a second amount of hydrogen or a second amount of oxygen into the processing chamber, the second amount of hydrogen greater than zero and less than the first amount of hydrogen and the second amount of oxygen greater than zero and less than the first amount of oxygen.
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公开(公告)号:US20190157379A1
公开(公告)日:2019-05-23
申请号:US16240194
申请日:2019-01-04
发明人: Bhaskar Srinivasan , Guru Mathur , Stephen Arlon Meisner , Shih Chang Chang , Corinne Ann Gagnet
IPC分类号: H01L49/02 , H01L21/768 , H01L21/02 , H01L27/108 , H01L29/16 , H01L27/06 , H01L29/66
摘要: An integrated circuit includes a capacitor located over a semiconductor substrate. The capacitor includes a first conductive layer having a first lateral perimeter, and a second conductive layer having a second smaller lateral perimeter. A first dielectric layer is located between the second conductive layer and the first conductive layer. The first dielectric layer has a thinner portion having the first lateral perimeter and a thicker portion having the second lateral perimeter. An interconnect line is located over the substrate, and includes a third conductive layer that is about coplanar with and has about a same thickness as the first conductive layer. A second dielectric layer is located over the third conductive layer. The second dielectric layer is about coplanar with and has about a same thickness as the thinner portion of the first dielectric layer.
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