公开(公告)号：US06664941B2

公开(公告)日：2003-12-16

申请号：US10189452

申请日：2002-07-08

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G09G336

CPC classification number: H03F3/303 ,  G09G3/3688 ,  H03F3/3023

Abstract: An amplifier circuit including an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected, and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.

Abstract translation: 一种放大器电路，包括输入级和输出级，级联连接在输入输入信号的信号输入端与连接有电容性负载的信号输出端之间，并且至少包括输入放大级 和输出放大级，以及至少包括插入在输出放大级的输出端子与信号输出端子之间的电阻器的电阻电路。

公开(公告)号：US06480178B1

公开(公告)日：2002-11-12

申请号：US09128414

申请日：1998-08-04

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G09G336

CPC classification number: H03F3/303 ,  G09G3/3688 ,  H03F3/3023

Abstract: An amplifier circuit comprising an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.

Abstract translation: 一种放大器电路，包括输入级和输出级，级联连接在输入信号输入的信号输入端与连接有电容性负载的信号输出端之间，并且至少包括输入放大级和 输出放大级，以及至少包括插入在输出放大级的输出端子与信号输出端子之间的电阻器的电阻电路。

公开(公告)号：US5162670A

公开(公告)日：1992-11-10

申请号：US636427

申请日：1990-12-28

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G09G3/36 ,  G11C27/02

CPC classification number: G11C27/026 ,  G11C27/024 ,  G09G2310/0289 ,  G09G3/3688

Abstract: A sample-and-hold circuit includes a first switch element which is opened or closed in accordance with a first control signal so as to selectively connect an input signal terminal for receiving an input signal to an internal terminal, a non-linear element for connecting the internal terminal to an output terminal, a potential holding circuit connected between the output terminal and ground, and a second switch element or a current source circuit which is controlled by a second control signal so as to selectively connect the output terminal to ground.

公开(公告)号：US5623279A

公开(公告)日：1997-04-22

申请号：US304544

申请日：1994-09-12

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  G09G3/34

CPC classification number: G09G3/2011 ,  G09G3/3688 ,  G09G2310/0291 ,  G09G2310/0297

Abstract: A capacitative load driving circuit is provided in a liquid crystal display device and has an input selection circuit having a wide and effective voltage range of an input signal. The driving circuit changes over through source or emitter followers formed by two types of conductivity, for detecting as to whether or not a potential of the input signal is in an input voltage range of a differential amplifier circuit constituting a voltage follower after selecting at least one input signal through any of source or emitter followers.

Abstract translation: 电容负载驱动电路设置在液晶显示装置中，并且具有输入选择电路，其具有输入信号的宽且有效的电压范围。 驱动电路通过由两种导电类型形成的源极或发射极跟随器而改变，用于检测输入信号的电位是否在构成电压跟随器的差分放大器电路的输入电压范围内，在选择至少一个 通过任何源或发射体跟随器输入信号。

公开(公告)号：US06549196B1

公开(公告)日：2003-04-15

申请号：US09401847

申请日：1999-09-22

Applicant: Takashi Taguchi ,  Takeshi Shima ,  Tetsuro Itakura

Inventor： Takashi Taguchi ,  Takeshi Shima ,  Tetsuro Itakura

IPC: B09G500

CPC classification number: H03M1/0872 ,  G09G3/3688 ,  G09G2310/027 ,  H03M1/765

Abstract: A D/A conversion circuit which can perform D/A conversion at high speed and with high precision is disclosed. The D/A conversion circuit comprises an analog reference power supply, an output buffer, a multiplexer, a pre-buffer, and a current changeover switch. The pre-buffer operates with a power supply voltage different from that of the analog reference power supply, and outputs a voltage substantially equal to an output voltage of the analog reference power supply. For a predetermined period after logic of digital data changes, the output voltage of the pre-buffer is supplied to the output buffer, and an input parasitic capacitor of the output buffer is charged/discharged. After the predetermined period elapses, the output voltage of the analog reference power supply is supplied to the output buffer. Therefore, a charging/discharging current of the input parasitic capacitor does not flow through the analog reference power supply, and fluctuation of the output voltage of the analog reference power supply can be suppressed.

Abstract translation: 公开了一种可以高速，高精度地执行D / A转换的D / A转换电路。 D / A转换电路包括模拟参考电源，输出缓冲器，多路复用器，预缓冲器和电流切换开关。 预缓冲器以与模拟基准电源不同的电源电压工作，并输出基本上等于模拟基准电源的输出电压的电压。 在数字数据的逻辑变化之后的预定时间内，预缓冲器的输出电压被提供给输出缓冲器，并且输出缓冲器的输入寄生电容器被充电/放电。 经过预定时间后，模拟基准电源的输出电压被提供给输出缓冲器。 因此，输入的寄生电容器的充电/放电电流不会流过模拟基准电源，并且可以抑制模拟基准电源的输出电压的波动。

公开(公告)号：US5376841A

公开(公告)日：1994-12-27

申请号：US143127

申请日：1993-10-29

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G09G3/36 ,  G11C27/02 ,  H03K5/153 ,  H03K5/24

CPC classification number: G11C27/026 ,  G11C27/024 ,  G09G2310/0289 ,  G09G3/3688

Abstract: A sample-and-hold circuit device which includes a plurality of sample-and-hold circuits and a comparator/amplifier for comparing a reference potential with an output signal which is output from the plurality of sample-and-hold circuits so as to amplify a difference between these two signals. An output of the comparator/amplifier is fed back to respective control terminals of the different sample-and-hold circuits, each being provided as a level control signal. In another embodiment, a plurality of adding circuits are provided for adding the outputs of the plurality of sample-and-hold circuits and then comparing this value with an arbitrary reference potential, whereby a difference between the sum value and the arbitrary reference potential is amplified and fed back to the control terminals of the sample-and-hold circuits.

Abstract translation: 一种采样保持电路装置，包括多个采样保持电路和用于将参考电位与从多个采样和保持电路输出的输出信号进行比较的比较器/放大器，以便放大 这两个信号之间的区别。 比较器/放大器的输出反馈到不同取样和保持电路的各个控制端，每个控制端被提供为电平控制信号。 在另一个实施例中，提供多个加法电路用于将多个采样和保持电路的输出相加，然后将该值与任意的参考电位进行比较，从而放大和值和任意参考电位之间的差值 并反馈到采样保持电路的控制端子。

公开(公告)号：US5343089A

公开(公告)日：1994-08-30

申请号：US155905

申请日：1993-11-23

Applicant: Tetsuro Itakura ,  Takeshi Shima

Inventor： Tetsuro Itakura ,  Takeshi Shima

IPC: G09G3/36 ,  G11C27/02

CPC classification number: G11C27/026 ,  G11C27/024 ,  G09G2310/0289 ,  G09G3/3688

Abstract: A sample-and-hold circuit includes a first switch element which is opened or closed in accordance with a first control signal so as to selectively connect an input signal terminal for receiving an input signal to an internal terminal, a non-linear element for connecting the internal terminal to an output terminal, a potential holding circuit connected between the output terminal and ground, and a second switch element or a current source circuit which is controlled by a second control signal so as to selectively connect the output terminal to ground.

Abstract translation: 采样保持电路包括根据第一控制信号打开或关闭的第一开关元件，以选择性地将用于接收输入信号的输入信号端子连接到内部端子，用于连接的非线性元件 输出端子的内部端子，连接在输出端子和地之间的电位保持电路以及由第二控制信号控制的第二开关元件或电流源电路，以选择性地将输出端子连接到地。

公开(公告)号：US08593111B2

公开(公告)日：2013-11-26

申请号：US12559072

申请日：2009-09-14

Applicant: Yoshinao Tatebayashi ,  Tetsuro Itakura ,  Nobuo Shibuya ,  Norio Takami

Inventor： Yoshinao Tatebayashi ,  Tetsuro Itakura ,  Nobuo Shibuya ,  Norio Takami

IPC: H02J7/00

CPC classification number: H02J7/0021 ,  H01M10/42 ,  H02J7/0031

Abstract: In an assembled battery system, parallel battery blocks are connected in series. Each of the battery blocks includes battery unit modules connected in parallel, and each of the modules includes a battery unit and a fuse connected in series. The battery block is provided with a common connection line connected to a fuse monitoring module, and MOS-FETs each having a gate, source and drain, wherein the fuse is connected between the gate and source, and the drain is connected to the connection line. The FET is turned on and a voltage is applied to the connection line through the FET from the battery unit, when the fuse is blown out. Thus, the fuse monitoring module can detects the blowout of the fuse, and a control module can turn off a control switch to stop charging/discharging of the assembled battery in accordance with the control signal from the fuse monitoring module.

Abstract translation: 在组合电池系统中，并联电池块串联连接。 每个电池块包括并联连接的电池单元模块，并且每个模块包括串联连接的电池单元和熔丝。 电池块设有连接到保险丝监视模块的公共连接线，以及各自具有栅极，源极和漏极的MOS-FET，其中，熔丝连接在栅极和源极之间，漏极连接到连接线 。 当保险丝熔断时，FET被接通并且通过FET从电池单元向连接线施加电压。 因此，熔丝监视模块可以检测熔丝的喷出，并且控制模块可以根据来自熔丝监视模块的控制信号关闭控制开关以停止组电池的充电/放电。

公开(公告)号：US08350547B2

公开(公告)日：2013-01-08

申请号：US12878271

申请日：2010-09-09

Applicant: Takeshi Ueno ,  Tetsuro Itakura

Inventor： Takeshi Ueno ,  Tetsuro Itakura

IPC: G05F1/00

CPC classification number: H02M3/1563

Abstract: A DC to DC converter includes an input terminal, an output terminal, first and second switches, an inductor, a smoothing unit, a first impedance element, a first resistor element, an operational amplifier and a control unit. The first switch is connected to the input terminal. The second switch is connected to the first switch and a ground terminal. The inductor is connected to the first switch and the output terminal. The smoothing unit is connected to the inductor and the ground terminal. The first impedance element is connected to the smoothing unit. The first resistor element is connected in series with the first impedance element. The operational amplifier is connected to the first impedance element. Reference voltage is added to the operational amplifier. The control unit controls the first and second switches according to a control signal outputted from the operational amplifier.

Abstract translation: DC-DC转换器包括输入端子，输出端子，第一和第二开关，电感器，平滑单元，第一阻抗元件，第一电阻元件，运算放大器和控制单元。 第一个开关连接到输入端。 第二开关连接到第一开关和接地端子。 电感器连接到第一开关和输出端子。 平滑单元连接到电感器和接地端子。 第一阻抗元件连接到平滑单元。 第一电阻元件与第一阻抗元件串联连接。 运算放大器连接到第一阻抗元件。 参考电压加到运算放大器上。 控制单元根据从运算放大器输出的控制信号来控制第一和第二开关。

公开(公告)号：US20120241599A1

公开(公告)日：2012-09-27

申请号：US13308646

申请日：2011-12-01

Applicant: Hiroshi Uemura ,  Ippei Akita ,  Tetsuro Itakura ,  Hideto Furuyama

Inventor： Hiroshi Uemura ,  Ippei Akita ,  Tetsuro Itakura ,  Hideto Furuyama

IPC: H01J40/12 ,  H03L5/00

CPC classification number: H04B10/69 ,  H04B10/25

Abstract: According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.

Abstract translation: 根据一个实施例，电路包括第一电阻器，其被配置为具有输入第一电压的一端和输出第二电压的另一端和配置成具有连接到第一电压的另一端的反相输入的第一放大器 电阻器和输入第三电压的同相输入端。 电路还包括第一电容器，其被配置为具有输入第一放大器的输出的一端和第一电阻器的另一端连接到的另一端。 连接到第一电阻器的另一端的第一放大器的输出或第二放大器的输出是第四电压。 在该电路中，由第一电容器和第一放大器组成的第一电阻器和反射镜电容器构成低通滤波器。