公开(公告)号：US20070067696A1

公开(公告)日：2007-03-22

申请号：US11222008

申请日：2005-09-08

申请人： Tejas Bhatt ,  Victor Stolpman ,  Dennis McCain

发明人： Tejas Bhatt ,  Victor Stolpman ,  Dennis McCain

IPC分类号： H03M13/00

CPC分类号： H03M13/271 ,  H03M13/296

摘要： A system, transmitter, receiver, method, and computer program product are provided in which a plurality of structured interleavers permute data bits arranged in a data bit matrix for Zigzag encoding. For each interleaver, the data bits in each column of the data bit matrix are cyclically shifted, with the amount of the shift being predefined and different for each column. In addition to the cycle shift, each column may be bit reverse ordered, and entire columns may be swapped. The interleaved data bit matrix may then be encoded using a Zigzag encoder to generate parity bits that may be transmitted, along with the data bits, from a transmitter to a receiver where the data may be iteratively decoded.

摘要翻译： 提供了一种系统，发射机，接收机，方法和计算机程序产品，其中多个结构化交织器将配置在数据位矩阵中的数据位置换为Z字形编码。 对于每个交织器，数据位矩阵的每列中的数据位被循环移位，其中移位量预定义并且对于每列是不同的。 除了循环移位之外，每一列都可以是反向排序的，并且整个列可以被交换。 然后可以使用Zigzag编码器对交织的数据位矩阵进行编码，以产生可以与数据比特一起从发射机发送到可以迭代地解码数据的接收机的奇偶校验位。

公开(公告)号：US20070089016A1

公开(公告)日：2007-04-19

申请号：US11253207

申请日：2005-10-18

申请人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Victor Stolpman ,  Dennis McCain

发明人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Victor Stolpman ,  Dennis McCain

IPC分类号： H03M13/00

CPC分类号： H03M13/1145 ,  H03M13/1111 ,  H03M13/1117 ,  H03M13/1122 ,  H03M13/1131

摘要： An error correction decoder for block serial pipelined layered decoding of block codes includes primary and mirror memories that are each capable of storing log-likelihood ratios (LLRs) for one or more iterations of an iterative decoding technique. The decoder also includes a plurality of elements capable of processing, for one or more iterations, one or more layers of a parity-check matrix. The elements include an iterative decoder element capable of calculating, for one or more iterations or layers, a LLR adjustment based upon the LLR for a previous iteration/layer, the LLR for the previous iteration/layer being read from the primary memory. The decoder further includes a summation element capable of reading the LLR for the previous iteration/layer from the mirror memory, and calculating the LLR for the iteration/layer based upon the LLR adjustment for the iteration/layer and the previous iteration/layer LLR for the previous iteration/layer.

摘要翻译： 用于块码的块串行流水线分层解码的纠错解码器包括主存储器和镜像存储器，每个存储器能够存储用于迭代解码技术的一次或多次迭代的对数似然比（LLR）。 解码器还包括能够对一个或多个迭代处理奇偶校验矩阵的一个或多个层的多个元件。 元素包括迭代解码器元件，其能够针对一个或多个迭代或层来计算基于先前迭代/层的LLR的LLR调整，从主存储器读取先前迭代/层的LLR。 解码器还包括能够从镜像存储器读取先前迭代/层的LLR并且基于迭代/层和先前的迭代/层LLR的LLR调整来计算迭代/层的LLR的求和元素，用于 以前的迭代/层。

公开(公告)号：US07613104B2

公开(公告)日：2009-11-03

申请号：US11444735

申请日：2006-05-31

申请人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Jianzhong Zhang ,  Dennis McCain

发明人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Jianzhong Zhang ,  Dennis McCain

IPC分类号： H04J11/00

CPC分类号： H04L27/2656 ,  H04L27/2659 ,  H04L27/266 ,  H04L27/2662 ,  H04L27/2675 ,  H04L27/2678

摘要： Disclosed is a method, a computer program product and a device that includes a receiver for receiving a downlink signal transmitted into a cell. The receiver is operable to obtain time, carrier frequency and cell-specific preamble synchronization to the received signal and includes a plurality of synchronization units that include a first detector to detect a frame boundary using preamble delay correlation; a second detector to detect the frame boundary with greater precision using a conjugate symmetry property over a region identified by the first detector; a cyclic prefix correlator to resolve symbol boundary repetition; an estimator, using the cyclic prefix, to estimate and correct a fractional carrier frequency offset; an operator to perform a Fast Fourier Transform of an identified preamble symbol and a frequency domain cross-correlator to identify cell-specific preamble sequences and an integer frequency offset in sub-carrier spacing. The transmitted signal may be a downlink signal transmitted into the cell from a base station that is compatible with IEEE 802.16e (WiMAX).

摘要翻译： 公开了一种方法，计算机程序产品和设备，其包括用于接收发送到小区中的下行链路信号的接收机。 接收机可操作以获得对接收信号的时间，载波频率和小区特定前导码同步，并且包括多个同步单元，其包括使用前导延迟相关来检测帧边界的第一检测器; 第二检测器，使用在由第一检测器识别的区域上的共轭对称性检测更高精度的帧边界; 用于解析符号边界重复的循环前缀相关器; 使用循环前缀的估计器来估计和校正分数载波频率偏移; 执行所识别的前导码符号的快速傅立叶变换和频域交叉相关器以识别小区特定前导码序列和子载波间隔中的整数频率偏移的运算符。 所发送的信号可以是从与IEEE 802.16e（WiMAX）兼容的基站发送到小区的下行链路信号。

公开(公告)号：US20070280098A1

公开(公告)日：2007-12-06

申请号：US11444735

申请日：2006-05-31

申请人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Jianzhong Zhang ,  Dennis McCain

发明人： Tejas Bhatt ,  Vishwas Sundaramurthy ,  Jianzhong Zhang ,  Dennis McCain

IPC分类号： H04J11/00

CPC分类号： H04L27/2656 ,  H04L27/2659 ,  H04L27/266 ,  H04L27/2662 ,  H04L27/2675 ,  H04L27/2678

摘要： Disclosed is a method, a computer program product and a device that includes a receiver for receiving a downlink signal transmitted into a cell. The receiver is operable to obtain time, carrier frequency and cell-specific preamble synchronization to the received signal and includes a plurality of synchronization units that include a first detector to detect a frame boundary using preamble delay correlation; a second detector to detect the frame boundary with greater precision using a conjugate symmetry property over a region identified by the first detector; a cyclic prefix correlator to resolve symbol boundary repetition; an estimator, using the cyclic prefix, to estimate and correct a fractional carrier frequency offset; an operator to perform a Fast Fourier Transform of an identified preamble symbol and a frequency domain cross-correlator to identify cell-specific preamble sequences and an integer frequency offset in sub-carrier spacing. The transmitted signal may be a downlink signal transmitted into the cell from a base station that is compatible with IEEE 802.16e (WiMAX).

摘要翻译： 公开了一种方法，计算机程序产品和设备，其包括用于接收发送到小区中的下行链路信号的接收机。 接收机可操作以获得对接收信号的时间，载波频率和小区特定前导码同步，并且包括多个同步单元，其包括使用前导延迟相关来检测帧边界的第一检测器; 第二检测器，使用在由第一检测器识别的区域上的共轭对称性检测更高精度的帧边界; 用于解析符号边界重复的循环前缀相关器; 使用循环前缀的估计器来估计和校正分数载波频率偏移; 执行所识别的前导码符号的快速傅立叶变换和频域交叉相关器以识别小区特定前导码序列和子载波间隔中的整数频率偏移的运算符。 所发送的信号可以是从与IEEE 802.16e（WiMAX）兼容的基站发送到小区的下行链路信号。

公开(公告)号：US20060193374A1

公开(公告)日：2006-08-31

申请号：US11067498

申请日：2005-02-25

申请人： Yuanbin Guo ,  Dennis McCain ,  Joseph Cavallaro

发明人： Yuanbin Guo ,  Dennis McCain ,  Joseph Cavallaro

IPC分类号： H04L27/06 ,  H03D1/04 ,  H04B1/707

CPC分类号： H04B1/71075 ,  H04B2001/71077 ,  H04B2201/70707

摘要： A system, apparatus and method for a multi-stage Parallel Residue Compensation (PRC) receiver for enhanced suppression of the Multiple Access Interference (MAI) in Code Division Multiple Access (CDMA) systems. The accuracy of the interference estimation is improved with a set of weights computed from an adaptive Normalized Least Mean Square (NLMS) algorithm. In order to reduce complexity, the commonality of the multi-code processing is extracted and used to derive a structure of PRC to avoid direct interference cancellation. The derived PRC structure reduces the interference cancellation architecture from a complexity that is proportional to the square of the number of users to a complexity that is linear with respect to the number of users. The complexity is further reduced by replacing dedicated multiplier circuits with simple combinational logic.

摘要翻译： 一种用于增强抑制码分多址（CDMA）系统中的多址干扰（MAI）的多级并行残差补偿（PRC）接收机的系统，装置和方法。 通过从自适应归一化最小二乘法（NLMS）算法计算的一组权重，改善了干扰估计的准确性。 为了降低复杂度，提取多码处理的通用性，并用于导出PRC的结构，以避免直接干扰消除。 导出的PRC结构从与用户数量的平方成正比于与用户数量相关的复杂度的复杂度降低了干扰消除架构。 通过用简单的组合逻辑替换专用乘法电路，进一步降低了复杂度。

公开(公告)号：US07706430B2

公开(公告)日：2010-04-27

申请号：US11067498

申请日：2005-02-25

申请人： Yuanbin Guo ,  Dennis McCain ,  Joseph R. Cavallaro

发明人： Yuanbin Guo ,  Dennis McCain ,  Joseph R. Cavallaro

IPC分类号： H04L27/06

CPC分类号： H04B1/71075 ,  H04B2001/71077 ,  H04B2201/70707

摘要： A system, apparatus and method for a multi-stage Parallel Residue Compensation (PRC) receiver for enhanced suppression of the Multiple Access Interference (MAI) in Code Division Multiple Access (CDMA) systems. The accuracy of the interference estimation is improved with a set of weights computed from an adaptive Normalized Least Mean Square (NLMS) algorithm. In order to reduce complexity, the commonality of the multi-code processing is extracted and used to derive a structure of PRC to avoid direct interference cancellation. The derived PRC structure reduces the interference cancellation architecture from a complexity that is proportional to the square of the number of users to a complexity that is linear with respect to the number of users. The complexity is further reduced by replacing dedicated multiplier circuits with simple combinational logic.

摘要翻译： 一种用于增强抑制码分多址（CDMA）系统中的多址干扰（MAI）的多级并行残差补偿（PRC）接收机的系统，装置和方法。 通过从自适应归一化最小二乘法（NLMS）算法计算的一组权重，改善了干扰估计的准确性。 为了降低复杂度，提取多码处理的通用性，并用于导出PRC的结构，以避免直接干扰消除。 导出的PRC结构从与用户数量的平方成正比于与用户数量相关的复杂度的复杂度降低了干扰消除架构。 通过用简单的组合逻辑替换专用乘法电路，进一步降低了复杂度。

公开(公告)号：US07443909B2

公开(公告)日：2008-10-28

申请号：US11020055

申请日：2004-12-21

申请人： Hoang Nguyen ,  Jianzhong Zhang ,  Yuanbin Guo ,  Dennis McCain ,  Joe Dowling

发明人： Hoang Nguyen ,  Jianzhong Zhang ,  Yuanbin Guo ,  Dennis McCain ,  Joe Dowling

IPC分类号： H04B1/707

CPC分类号： H04B1/71052 ,  H04B1/71055

摘要： Receiving downlink CDMA signals in a fast-fading environment is facilitated at higher receiver velocities by updating the block-adaptive linear minimum mean square error (LMMSE) downlink CDMA equalizer. The autocorrelation matrix of the observed data is updated by passing block-wise autocorrelation slides through a filter. Each autocorrelation slide is an autocorrelation matrix estimated from a short block of observed data over which the channel can be considered constant. This method achieves a reliable estimate for the autocorrelation matrix when the block size must be small to ensure that the block-wise stationarity assumption holds in cases of fast fading channels. In addition, small block sizes make it possible to satisfy the equalizer delay constraint imposed by hardware and certain voice transmission standards such as CDMA2000 1X where demodulated data must be delivered within only several symbol periods of the signal arrival time.

摘要翻译： 通过更新块自适应线性最小均方误差（LMMSE）下行链路CDMA均衡器，在更高的接收机速度下，在快衰落环境中接收下行链路CDMA信号。 观察数据的自相关矩阵通过通过滤波器的块自相关滑块来更新。 每个自相关幻灯片是从观测数据的短块估计的自相关矩阵，其中信道可以被认为是恒定的。 当块大小必须小时，该方法实现了自相关矩阵的可靠估计，以确保在快速衰落信道的情况下保持块状平稳性假设。 此外，小块大小使得可以满足由硬件和某些语音传输标准（例如CDMA2000 1X）施加的均衡器延迟约束，其中必须在信号到达时间的几个符号周期内传送解调数据。

公开(公告)号：US20060133462A1

公开(公告)日：2006-06-22

申请号：US11020055

申请日：2004-12-21

申请人： Hoang Nguyen ,  Jianzhong Zhang ,  Yuanbin Guo ,  Dennis McCain ,  Joe Dowling

发明人： Hoang Nguyen ,  Jianzhong Zhang ,  Yuanbin Guo ,  Dennis McCain ,  Joe Dowling

IPC分类号： H04B1/707

CPC分类号： H04B1/71052 ,  H04B1/71055

摘要： Receiving downlink CDMA signals in a fast-fading environment is facilitated at higher receiver velocities by updating the block-adaptive linear minimum mean square error (LMMSE) downlink CDMA equalizer. The autocorrelation matrix of the observed data is updated by passing block-wise autocorrelation slides through a filter. Each autocorrelation slide is an autocorrelation matrix estimated from a short block of observed data over which the channel can be considered constant. This method achieves a reliable estimate for the autocorrelation matrix when the block size must be small to ensure that the block-wise stationarity assumption holds in cases of fast fading channels. In addition, small block sizes make it possible to satisfy the equalizer delay constraint imposed by hardware and certain voice transmission standards such as CDMA2000 1× where demodulated data must be delivered within only several symbol periods of the signal arrival time. Preliminary simulation results obtained under the 1× standard show that the proposed method outperforms the Rake receiver and the ordinary block LMMSE equalizer in the presence of filtering delay. The improvement over the ordinary block LMMSE equalizer is substantial in cases of high mobility.

摘要翻译： 通过更新块自适应线性最小均方误差（LMMSE）下行链路CDMA均衡器，在更高的接收机速度下，在快衰落环境中接收下行链路CDMA信号。 观察数据的自相关矩阵通过通过滤波器的块自相关滑块来更新。 每个自相关幻灯片是从观测数据的短块估计的自相关矩阵，其中信道可以被认为是恒定的。 当块大小必须小时，该方法实现了自相关矩阵的可靠估计，以确保在快速衰落信道的情况下保持块状平稳性假设。 此外，小块大小使得可以满足由硬件和某些语音传输标准（例如CDMA2000 1x）施加的均衡器延迟约束，其中必须在信号到达时间的几个符号周期内传送解调数据。 在1x标准下获得的初步仿真结果表明，所提出的方法在存在滤波延迟的情况下优于Rake接收机和普通块LMMSE均衡器。 在高移动性的情况下，对普通块LMMSE均衡器的改进是显着的。

公开(公告)号：US07492815B2

公开(公告)日：2009-02-17

申请号：US10997397

申请日：2004-11-24

申请人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph R. Cavallaro

发明人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph R. Cavallaro

IPC分类号： H04B1/707 ,  H03H7/30

CPC分类号： H04L25/03038 ,  H04B1/71055 ,  H04L25/0204 ,  H04L25/021 ,  H04L25/0242 ,  H04L25/0328 ,  H04L2025/03375 ,  H04L2025/03426 ,  H04L2025/03477 ,  H04L2025/03605

摘要： Disclosed is a LMMSE receiver that restores orthogonality of spreading codes in the downlink channel for a spread spectrum signal received over N receive antennas. The FFT-based chip equalizer tap solver reduces the direct matrix inverse of the prior art to the inverse of some submatrices of size N×N with the dimension of the receive antennas, and most efficiently reduces matrix inverses to no larger than 2×2. Complexity is further reduced over a conventional Fast Fourier Transform approach by Hermitian optimization to the inverse of submatrices and tree pruning. For a receiver with N=4 or N=2 with double oversampling, the resulting 4×4 matrices are partitioned into 2×2 block sub-matrices, inverted, and rebuilt into a 4×4 matrix. Common computations are found and repeated computations are eliminated to improve efficiency. Generic design architecture is derived from the special design blocks to eliminate redundancies in complex operations. Optimally, the architecture is parallel and pipelined.

摘要翻译： 公开了一种用于在N个接收天线上接收的扩频信号的下行链路信道中恢复扩频码的正交性的LMMSE接收机。 基于FFT的码片均衡器抽头解算器将现有技术的直接矩阵逆减少为具有接收天线的尺寸的尺寸为N×N的一些子矩阵的倒数，并且最有效地将矩阵反转减小到不大于2×2。 通过Hermitian优化，传统的快速傅立叶变换方法，复杂度进一步降低到子矩阵和树剪枝的倒数。 对于具有N = 4或N = 2的具有双重过采样的接收机，所得到的4×4矩阵被划分为2x2块子矩阵，被反转并重建为4×4矩阵。 发现常规计算，消除重复计算以提高效率。 通用设计架构源于特殊的设计模块，以消除复杂操作中的冗余。 最佳的架构是并行和流水线的。

公开(公告)号：US20060146759A1

公开(公告)日：2006-07-06

申请号：US11029900

申请日：2005-01-04

申请人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph Cavallaro

发明人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph Cavallaro

IPC分类号： H04B7/216

CPC分类号： H04L25/03057 ,  H04B1/707 ,  H04L2025/03426 ,  H04L2025/03522 ,  H04L2025/0363

摘要： An apparatus and corresponding method for receiving a MIMO cellular communication signal, the apparatus including: a Kalman filter type of equalizer, responsive to a received signal, for providing a corresponding processed signal indicating information conveyed by the received signal, responsive to a set of values indicating predicted state error correlation at a first instant of time given all noise estimates up through the first instant, for providing ta set of values indicating a product of measurement values and predicted state error correlation at a later instant of time given all process noise estimates up through the later instant. The filter is implemented so as to make use of the displacement structure of the state transition matrix of the Kalman filter allowing shifting operations in place of vector and matrix multiplications. The filter typically includes a transition and common data path that provides to both a Kalman gain processor and a Riccati processor the set of values indicating a product of measurement values and predicted state error correlation at a later instant of time given all process noise estimates up through the later instant.

摘要翻译： 一种用于接收MIMO蜂窝通信信号的装置和相应方法，所述装置包括：响应于接收信号的卡尔曼滤波器类型的均衡器，用于响应于一组值提供指示由接收信号传送的信息的相应处理信号 指示在第一时刻给出所有噪声估计值的第一时刻的预测状态误差相关性，以便在给定所有过程噪声估计上升的情况下提供指示测量值的乘积的值和在稍后时刻的预测状态误差相关性的值 通过后来的时刻。 滤波器被实现为利用卡尔曼滤波器的状态转移矩阵的位移结构，允许移位操作代替矢量和矩阵乘法。 该滤波器通常包括一个转换和公共数据路径，向卡尔曼增益处理器和Riccati处理器提供一组值，该值指示在所有过程噪声估计值通过的时间点的测量值和预测状态误差相关的乘积 后来的时刻。