公开(公告)号：US11908790B2

公开(公告)日：2024-02-20

申请号：US17142809

申请日：2021-01-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Po-Hao Tsai ,  Ching-Wen Hsiao ,  Hong-Seng Shue ,  Yu-Tse Su

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/528 ,  H01L23/532 ,  H01L25/065 ,  H01L21/48

CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L21/4853 ,  H01L21/76877 ,  H01L23/528 ,  H01L24/14

Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes a conductive line over the substrate. The chip structure includes a first passivation layer over the substrate and the conductive line. The chip structure includes a conductive pad over the first passivation layer covering the conductive line. The conductive pad is thicker and wider than the conductive line. The chip structure includes a first conductive via structure and a second conductive via structure passing through the first passivation layer and directly connected between the conductive pad and the conductive line. The chip structure includes a conductive pillar over the conductive pad.

公开(公告)号：US20230063096A1

公开(公告)日：2023-03-02

申请号：US17461972

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Wen-Hsiung Lu ,  Jhao-Yi Wang ,  Fu Wei Liu ,  Chin-Yu Ku

IPC: H01L23/48 ,  H01L21/48 ,  H01L21/768

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

公开(公告)号：US20230395468A1

公开(公告)日：2023-12-07

申请号：US18363733

申请日：2023-08-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Wen-Hsiung Lu ,  Jhao-Yi Wang ,  Fu Wei Liu ,  Chin-Yu Ku

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/48

CPC classification number: H01L23/481 ,  H01L21/76879 ,  H01L21/486

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

公开(公告)号：US11942398B2

公开(公告)日：2024-03-26

申请号：US17461972

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Wen-Hsiung Lu ,  Jhao-Yi Wang ,  Fu Wei Liu ,  Chin-Yu Ku

IPC: H01L21/76 ,  H01L21/48 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L21/76879

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

公开(公告)号：US11901266B2

公开(公告)日：2024-02-13

申请号：US17460709

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Wen-Hsiung Lu ,  Lung-Kai Mao ,  Fu-Wei Liu ,  Mirng-Ji Lii

IPC: H01L21/30 ,  H01L23/48 ,  H01L21/306 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/30608 ,  H01L21/76871

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a chip structure including a substrate and a wiring structure over a first surface of the substrate. The method includes removing a first portion of the wiring structure adjacent to the hole to widen a second portion of the hole in the wiring structure. The second portion has a first width increasing in a first direction away from the substrate. The method includes forming a first seed layer over the wiring structure and in the hole. The method includes thinning the substrate from a second surface of the substrate until the first seed layer in the hole is exposed. The method includes forming a second seed layer over the second surface of the substrate and the first seed layer in the hole.

公开(公告)号：US10269703B2

公开(公告)日：2019-04-23

申请号：US15434644

申请日：2017-02-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chin-Yu Ku ,  Sheng-Pin Yang ,  Chen-Shien Chen ,  Hon-Lin Huang ,  Chien-Chih Chou ,  Ting-Li Yang

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes: a first conductive line disposed on a substrate, a second conductive line disposed on the substrate, and the second conductive line separated with the first conductive line by a trench; an insulating layer disposed on the first conductive line and the second conductive line, and filled the trench between the first conductive line and the second conductive line; and a magnetic film having a first surface and a second surface opposite to the first surface, and the first surface disposed on the insulating layer; wherein the first surface has a first concave directly above the trench, and the first concave has a first obtuse angle of at least 170 degree.