公开(公告)号：US10985125B2

公开(公告)日：2021-04-20

申请号：US17029537

申请日：2020-09-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shu-Chia Hsu ,  Leu-Jen Chen ,  Yi-Wei Liu ,  Shang-Yun Hou ,  Jui-Hsieh Lai ,  Tsung-Yu Chen ,  Chien-Yuan Huang ,  Yu-Wei Chen

IPC: H01L29/40 ,  H01L21/44 ,  H01L23/00 ,  H01L21/56 ,  H01L23/522

Abstract: A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump.