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公开(公告)号:US11901390B2
公开(公告)日:2024-02-13
申请号:US17525968
申请日:2021-11-15
发明人: Yu-Chien Ku , Huai-Jen Tung , Keng-Ying Liao , Yi-Hung Chen , Shih-Hsun Hsu , Yi-Fang Yang
IPC分类号: H01L29/40 , H01L23/52 , H01L23/48 , H01L27/146 , H01L23/00
CPC分类号: H01L27/14636 , H01L24/05 , H01L27/14643 , H01L2224/0214 , H01L2224/0345 , H01L2224/03831 , H01L2224/0557 , H01L2224/05559 , H01L2224/05567 , H01L2224/05571 , H01L2224/05578
摘要: A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.
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公开(公告)号:US20240136383A1
公开(公告)日:2024-04-25
申请号:US18402734
申请日:2024-01-03
发明人: Yu-Chien Ku , Huai-Jen Tung , Keng-Ying Liao , Yi-Hung Chen , Shih-Hsun Hsu , Yi-Fang Yang
IPC分类号: H01L27/146 , H01L23/00
CPC分类号: H01L27/14636 , H01L24/05 , H01L27/14643 , H01L2224/0214 , H01L2224/0345 , H01L2224/03831 , H01L2224/05559 , H01L2224/05567 , H01L2224/0557 , H01L2224/05571 , H01L2224/05578
摘要: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
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公开(公告)号:US20220077217A1
公开(公告)日:2022-03-10
申请号:US17525968
申请日:2021-11-15
发明人: Yu-Chien Ku , Huai-Jen Tung , Keng-Ying Liao , Yi-Hung Chen , Shih-Hsun Hsu , Yi-Fang Yang
IPC分类号: H01L27/146 , H01L23/00
摘要: A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.
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公开(公告)号:US20210036179A1
公开(公告)日:2021-02-04
申请号:US16865819
申请日:2020-05-04
发明人: Chih Wei Sung , Chung-Bin Tseng , Keng-Ying Liao , Yen-Jou Wu , Po-Zen Chen , Su-Yu Yeh , Ching-Chung Su
IPC分类号: H01L31/18
摘要: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.
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公开(公告)号:US20230253433A1
公开(公告)日:2023-08-10
申请号:US18301714
申请日:2023-04-17
发明人: Keng-Ying Liao , Yu-Chu Lin , Chih Wei Sung , Shih Sian Wang , Chi-Chung Jen , Yu-chien Ku , Yen-Jou Wu , Huai-jen Tung , Po-Zen Chen
IPC分类号: H01L27/146
CPC分类号: H01L27/14636 , H01L27/1464 , H01L27/14683
摘要: A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.
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公开(公告)号:US20220367559A1
公开(公告)日:2022-11-17
申请号:US17873845
申请日:2022-07-26
发明人: Keng-Ying Liao , Huai-jen Tung , Chih Wei Sung , Po-Zen Chen , Yu-chien Ku , Yu-Chu Lin , Chi-Chung Jen , Yen-Jou Wu , Tsun-Kai Tsao , Yung-Lung Yang
IPC分类号: H01L27/146
摘要: A method includes forming a dielectric layer over a first surface of a semiconductor layer, the dielectric layer including a metallization layer. The method includes forming an opening to expose a portion of the dielectric layer. The method includes forming a buffer oxide layer lining the opening. The method includes forming, according to a patternable layer, a recess in the buffer oxide layer partially extending from a second surface of the buffer oxide layer. The method includes removing the patternable layer. The method includes extending the recess through the buffer oxide layer and a portion of the dielectric layer to expose a portion of the metallization layer. The method includes filling the recess with a conductive material to form a pad structure configured to provide electrical connection to the metallization layer.
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公开(公告)号:US11430909B2
公开(公告)日:2022-08-30
申请号:US16865819
申请日:2020-05-04
发明人: Chih Wei Sung , Chung-Bin Tseng , Keng-Ying Liao , Yen-Jou Wu , Po-Zen Chen , Su-Yu Yeh , Ching-Chung Su
IPC分类号: H01L27/146 , H01L31/18 , H01L23/544
摘要: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.
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公开(公告)号:US10658269B2
公开(公告)日:2020-05-19
申请号:US16389762
申请日:2019-04-19
发明人: Tsung-Han Tsai , Volume Chien , Yung-Lung Hsu , Chung-Bin Tseng , Keng-Ying Liao , Po-Zen Chen
IPC分类号: H01L21/76 , H01L21/331 , H01L21/44 , H01L23/48 , H01L21/768 , H01L27/06 , H01L27/146
摘要: The present disclosure provides a semiconductor structure. The structure includes a first substrate; a first dielectric layer having a first surface in proximity to the first substrate and a second surface away from the first substrate; a first interconnect penetrating the first surface of the first dielectric layer; and a protection layer extending along a portion of a sidewall of the first interconnect. A thickness of the protection layer is in a range of from about 0.02 μm to about 0.2 μm.
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公开(公告)号:US10269684B2
公开(公告)日:2019-04-23
申请号:US15815392
申请日:2017-11-16
发明人: Tsung-Han Tsai , Volume Chien , Yung-Lung Hsu , Chung-Bin Tseng , Keng-Ying Liao , Po-Zen Chen
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L21/768 , H01L27/06 , H01L27/146
摘要: The present disclosure provides a semiconductor structure. The structure includes a first substrate; a first dielectric layer having a first surface in proximity to the first substrate and a second surface away from the first substrate; a first interconnect penetrating the first surface of the first dielectric layer; and a protection layer extending along a portion of a sidewall of the first interconnect. A thickness of the protection layer is in a range of from about 0.02 μm to about 0.2 μm.
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公开(公告)号:US10056316B2
公开(公告)日:2018-08-21
申请号:US15823297
申请日:2017-11-27
发明人: Tsung-Han Tsai , Volume Chien , Yung-Lung Hsu , Chung-Bin Tseng , Keng-Ying Liao , Po-Zen Chen
IPC分类号: H01L21/44 , H01L23/48 , H01L21/768 , H01L27/06 , H01L27/146
CPC分类号: H01L23/481 , H01L21/76805 , H01L21/76831 , H01L21/76832 , H01L21/76898 , H01L27/0688 , H01L27/14634 , H01L2224/24147 , H01L2224/8203 , H01L2924/0002 , H01L2924/00
摘要: The present disclosure provides a semiconductor structure. The structure includes a first substrate; a first dielectric layer having a first surface in proximity to the first substrate and a second surface away from the first substrate; a first interconnect penetrating the first surface of the first dielectric layer; and a protection layer extending along a portion of a sidewall of the first interconnect. A thickness of the protection layer is in a range of from about 0.02 μm to about 0.2 μm.
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