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公开(公告)号：US20240395637A1
公开(公告)日：2024-11-28
申请号：US18789686
申请日：2024-07-31
Inventor： Chansyun Yang , Chan-Lon Yang , Keh-Jeng Chang , Perng-Fei Yuh
IPC: H01L21/66 , G03F7/00 , H01L21/027 , H01L21/67
Abstract: A method for real-time compensation control of an etch process includes: providing a substrate having a layer in a process chamber; performing the etch process on the layer; directing one or more wavelengths to a region of the layer by a beam conditioning assembly; receiving one or more reflected wavelengths from the region of the layer; predicting a process variable by processing the one or more reflected wavelengths using a machine learning model; and comparing the predicted process variable with a predetermined process variable to obtain a comparison result.
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公开(公告)号：US20230205974A1
公开(公告)日：2023-06-29
申请号：US18176701
申请日：2023-03-01
Inventor： Hung-Chih Ou , Kuo-Fu Lee , Wen-Hao Chen , Keh-Jeng Chang , Hsiang-Ho Chang
IPC: G06F30/398
CPC classification number: G06F30/398 , G06F2119/18
Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
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公开(公告)号：US20220335196A1
公开(公告)日：2022-10-20
申请号：US17231194
申请日：2021-04-15
Inventor： Hung-Chih Ou , Kuo-Fu Lee , Wen-Hao Chen , Keh-Jeng Chang , Hsiang-Ho Chang
IPC: G06F30/398
Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
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公开(公告)号：US11604915B2
公开(公告)日：2023-03-14
申请号：US17231194
申请日：2021-04-15
Inventor： Hung-Chih Ou , Kuo-Fu Lee , Wen-Hao Chen , Keh-Jeng Chang , Hsiang-Ho Chang
IPC: G06F30/398 , G06F119/18
Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
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公开(公告)号：US20220336294A1
公开(公告)日：2022-10-20
申请号：US17397989
申请日：2021-08-10
Inventor： Chansyun Yang , Chan-Lon Yang , Keh-Jeng Chang , Perng-Fei Yuh
IPC: H01L21/66 , G03F7/20 , H01L21/67 , H01L21/027
Abstract: An apparatus includes a beam conditioning assembly configured to output one or more wavelengths to a substrate being processed and receive one or more reflected wavelengths from the substrate, and a machine learning device configured to process the one or more reflected wavelengths to predict a process variable and compare the predicted process variable with a measured process variable to obtain a comparison result.
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Patent Agency Ranking
公开(公告)号：US11928416B2
公开(公告)日：2024-03-12
申请号：US18176701
申请日：2023-03-01
Inventor： Hung-Chih Ou , Kuo-Fu Lee , Wen-Hao Chen , Keh-Jeng Chang , Hsiang-Ho Chang
IPC: G06F30/398 , G06F119/18
CPC classification number: G06F30/398 , G06F2119/18
Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
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公开(公告)号：US12218015B2
公开(公告)日：2025-02-04
申请号：US17397989
申请日：2021-08-10
Inventor： Chansyun Yang , Chan-Lon Yang , Keh-Jeng Chang , Perng-Fei Yuh
IPC: H01L21/67 , G03F7/00 , H01L21/02 , H01L21/66 , H01L21/027
Abstract: An apparatus includes a beam conditioning assembly configured to output one or more wavelengths to a substrate being processed and receive one or more reflected wavelengths from the substrate, and a machine learning device configured to process the one or more reflected wavelengths to predict a process variable and compare the predicted process variable with a measured process variable to obtain a comparison result.
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公开(公告)号：US20240290836A1
公开(公告)日：2024-08-29
申请号：US18650905
申请日：2024-04-30
Inventor： Chansyun David Yang , Keh-Jeng Chang , Chan-Lon Yang , Perng-Fei Yuh
IPC: H01L29/06 , H01L21/8234 , H01L29/66 , H01L29/78
CPC classification number: H01L29/0673 , H01L21/823418 , H01L21/823431 , H01L29/66795 , H01L29/7851
Abstract: A semiconductor device with different configurations of gate structures and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a stack of nanostructured channel regions disposed on a fin structure, a first gate structure disposed within the stack of nanostructured channel regions, a second gate structure surrounds the first gate structure about a first axis and surrounds the nanostructured channel regions about a second axis different from the first axis, and first and second contact structures disposed on the first and second gate structures, respectively.
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公开(公告)号：US20240176944A1
公开(公告)日：2024-05-30
申请号：US18434345
申请日：2024-02-06
Inventor： Hung-Chih Ou , Kuo-Fu Lee , Wen-Hao Chen , Keh-Jeng Chang , Hsiang-Ho Chang
IPC: G06F30/398 , G06F119/18
CPC classification number: G06F30/398 , G06F2119/18
Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
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公开(公告)号：US11960210B2
公开(公告)日：2024-04-16
申请号：US18114805
申请日：2023-02-27
Inventor： Chansyun David Yang , Keh-Jeng Chang , Chan-Lon Yang
IPC: G03F7/00
CPC classification number: G03F7/70033 , G03F7/702
Abstract: A method for generating an extreme ultraviolet (EUV) radiation includes simultaneously irradiating two or more target droplets with laser light in an EUV radiation source apparatus to produce EUV radiation and collecting and directing the EUV radiation produced from the two or more target droplet by an imaging mirror.
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