公开(公告)号：US20210210490A1

公开(公告)日：2021-07-08

申请号：US17210873

申请日：2021-03-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Yao Huang ,  Wun-Jie Lin ,  Chia-Wei Hsu ,  Yu-Ti Su

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/94 ,  H01L27/02

Abstract: Capacitor cells are provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate connected to the first node. A second PMOS transistor is coupled between the second node and the power supply, and has a gate connected to the second node. A second NMOS transistor is coupled between the first node and the ground, a gate connected to the first node, and has a gate connected to the first node. Sources of the first and second PMOS transistors share a P+ doped region in N-type well region, and the first PMOS transistor is disposed between the second PMOS transistor and the first and second NMOS transistors.

公开(公告)号：US12170283B2

公开(公告)日：2024-12-17

申请号：US18300563

申请日：2023-04-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Yao Huang ,  Wun-Jie Lin ,  Chia-Wei Hsu ,  Yu-Ti Su

IPC: H01L27/092 ,  H01L27/02 ,  H01L27/08 ,  H01L29/06 ,  H01L29/08 ,  H01L29/861 ,  H01L29/94

Abstract: Capacitor cells are provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate directly connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate directly connected to the first node. A second PMOS transistor is coupled between the second node and the power supply, and has a gate directly connected to the second node. A second NMOS transistor is coupled between the first node and the ground, and has a gate directly connected to the first node. Sources of the first and second NMOS transistors share an N+ doped region in the P-type well region. The first NMOS transistor is disposed between the second NMOS transistor and the first and second PMOS transistors. Source of the first PMOS transistor is directly connected to the power supply.

公开(公告)号：US11664381B2

公开(公告)日：2023-05-30

申请号：US17210873

申请日：2021-03-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Yao Huang ,  Wun-Jie Lin ,  Chia-Wei Hsu ,  Yu-Ti Su

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/94 ,  H01L27/02 ,  H01L27/08 ,  H01L29/861

CPC classification number: H01L27/0928 ,  H01L27/0262 ,  H01L27/0266 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/94 ,  H01L27/0811 ,  H01L29/861

Abstract: Capacitor cells are provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate connected to the first node. A second PMOS transistor is coupled between the second node and the power supply, and has a gate connected to the second node. A second NMOS transistor is coupled between the first node and the ground, a gate connected to the first node, and has a gate connected to the first node. Sources of the first and second PMOS transistors share a P+ doped region in N-type well region, and the first PMOS transistor is disposed between the second PMOS transistor and the first and second NMOS transistors.