公开(公告)号：US11107630B2

公开(公告)日：2021-08-31

申请号：US16417797

申请日：2019-05-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Anderson Lin ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Fu-Chun Huang ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01G4/012 ,  H01G4/228 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/311 ,  H01G4/12 ,  H01L41/113 ,  H01L41/083 ,  H01L41/047

Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.

公开(公告)号：US11456330B2

公开(公告)日：2022-09-27

申请号：US16534330

申请日：2019-08-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Shih-Fen Huang ,  You-Ru Lin ,  Yan-Jie Liao

IPC: H01L41/31 ,  H01L27/20 ,  H01L41/314 ,  H01L41/09

Abstract: In some embodiments, the present disclosure relates to a method for recovering degraded device performance of a piezoelectric device. The method includes operating the piezoelectric device in a performance mode by applying one or more voltage pulses to the piezoelectric device, and determining that a performance parameter of the piezoelectric device has a first value that has deviated from a reference value by more than a predetermined threshold value during a first time period. During a second time period, the method further includes applying a bipolar loop to the piezoelectric device, comprising positive and negative voltage biases. During a third time period, the method further includes operating the piezoelectric device in the performance mode, wherein the performance parameter has a second value. An absolute difference between the second value and the reference value is less than an absolute difference between the first value and the reference value.

公开(公告)号：US20200098969A1

公开(公告)日：2020-03-26

申请号：US16413839

申请日：2019-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yan-Jie Liao

IPC: H01L41/08 ,  H01L41/047 ,  H01L41/297

Abstract: In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.

公开(公告)号：US11730058B2

公开(公告)日：2023-08-15

申请号：US16413839

申请日：2019-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yan-Jie Liao

IPC: H01L41/193 ,  H01L41/08 ,  H01L41/113 ,  D01F6/62 ,  H10N30/00 ,  H10N30/04 ,  H10N30/067 ,  H10N30/87 ,  H10N30/063

CPC classification number: H10N30/10513 ,  H10N30/04 ,  H10N30/067 ,  H10N30/877 ,  H10N30/063

Abstract: In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.

公开(公告)号：US11289568B2

公开(公告)日：2022-03-29

申请号：US16410259

申请日：2019-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Wen-Chuan Tai ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Anderson Lin ,  Fu-Chun Huang ,  Chun-Ren Cheng ,  Ivan Hua-Shu Wu ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01L49/02 ,  H01L23/58 ,  H01L23/00

Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.

公开(公告)号：US20210043680A1

公开(公告)日：2021-02-11

申请号：US16534330

申请日：2019-08-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Shih-Fen Huang ,  You-Ru Lin ,  Yan-Jie Liao

IPC: H01L27/20 ,  H01L41/09 ,  H01L41/314

Abstract: In some embodiments, the present disclosure relates to a method for recovering degraded device performance of a piezoelectric device. The method includes operating the piezoelectric device in a performance mode by applying one or more voltage pulses to the piezoelectric device, and determining that a performance parameter of the piezoelectric device has a first value that has deviated from a reference value by more than a predetermined threshold value during a first time period. During a second time period, the method further includes applying a bipolar loop to the piezoelectric device, comprising positive and negative voltage biases. During a third time period, the method further includes operating the piezoelectric device in the performance mode, wherein the performance parameter has a second value. An absolute difference between the second value and the reference value is less than an absolute difference between the first value and the reference value.

公开(公告)号：US20200006469A1

公开(公告)日：2020-01-02

申请号：US16410259

申请日：2019-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Wen-Chuan Tai ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Anderson Lin ,  Fu-Chun Huang ,  Chun-Ren Cheng ,  Ivan Hua-Shu Wu ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01L49/02 ,  H01L23/58

Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.

公开(公告)号：US20200098517A1

公开(公告)日：2020-03-26

申请号：US16417797

申请日：2019-05-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Anderson Lin ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Fu-Chun Huang ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01G4/012 ,  H01G4/228 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/311 ,  H01G4/12

Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.