公开(公告)号：US20200006469A1

公开(公告)日：2020-01-02

申请号：US16410259

申请日：2019-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Wen-Chuan Tai ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Anderson Lin ,  Fu-Chun Huang ,  Chun-Ren Cheng ,  Ivan Hua-Shu Wu ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01L49/02 ,  H01L23/58

Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.

公开(公告)号：US11107630B2

公开(公告)日：2021-08-31

申请号：US16417797

申请日：2019-05-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Anderson Lin ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Fu-Chun Huang ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01G4/012 ,  H01G4/228 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/311 ,  H01G4/12 ,  H01L41/113 ,  H01L41/083 ,  H01L41/047

Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.

公开(公告)号：US11289568B2

公开(公告)日：2022-03-29

申请号：US16410259

申请日：2019-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yuan Shih ,  Kai-Fung Chang ,  Shih-Fen Huang ,  Wen-Chuan Tai ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Anderson Lin ,  Fu-Chun Huang ,  Chun-Ren Cheng ,  Ivan Hua-Shu Wu ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01L49/02 ,  H01L23/58 ,  H01L23/00

Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.

公开(公告)号：US20200098517A1

公开(公告)日：2020-03-26

申请号：US16417797

申请日：2019-05-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Anderson Lin ,  Chun-Ren Cheng ,  Chi-Yuan Shih ,  Shih-Fen Huang ,  Yi-Chuan Teng ,  Yi Heng Tsai ,  You-Ru Lin ,  Yen-Wen Chen ,  Fu-Chun Huang ,  Fan Hu ,  Ching-Hui Lin ,  Yan-Jie Liao

IPC: H01G4/012 ,  H01G4/228 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/311 ,  H01G4/12

Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.