公开(公告)号：US11152338B2

公开(公告)日：2021-10-19

申请号：US16889498

申请日：2020-06-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Zhi-Qiang Wu ,  Chun-Fu Cheng ,  Chung-Cheng Wu ,  Yi-Han Wang ,  Chia-Wen Liu

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/10 ,  H01L29/775 ,  H01L29/786 ,  H01L21/8238 ,  H01L27/092 ,  H01L25/065 ,  H01L21/02 ,  H01L25/04 ,  H01L29/08 ,  H01L29/06 ,  H01L27/06 ,  H01L29/40 ,  H01L29/78 ,  B82Y99/00 ,  B82Y10/00

Abstract: A method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked in a first direction over a substrate, the first semiconductor layers being thicker than the second semiconductor layers. The method also includes patterning the stacked structure into a first fin structure and a second fin structure extending along a second direction substantially perpendicular to the first direction. The method further includes removing the first semiconductor layers of the first fin structure to form a plurality of nanowires. Each of the nanowires has a first height, there is a distance between two adjacent nanowires along the vertical direction, and the distance is greater than the first height. The method includes forming a first gate structure between the second semiconductor layers of the first fin structure.

公开(公告)号：US10672742B2

公开(公告)日：2020-06-02

申请号：US15794286

申请日：2017-10-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Zhi-Qiang Wu ,  Chun-Fu Cheng ,  Chung-Cheng Wu ,  Yi-Han Wang ,  Chia-Wen Liu

IPC: H01L29/66 ,  H01L25/065 ,  H01L21/02 ,  H01L25/04 ,  H01L29/423 ,  H01L29/10 ,  H01L29/08 ,  H01L29/775 ,  H01L29/786 ,  H01L29/06 ,  H01L27/06 ,  H01L29/40 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  B82Y99/00 ,  B82Y10/00

Abstract: A device includes a substrate, a stacked structure and a first gate stack. The stacked structure includes a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate. One of the first semiconductor layers has a height greater than a height of one the second semiconductor layers. The first gate stack wraps around the stacked structure.

公开(公告)号：US10516047B2

公开(公告)日：2019-12-24

申请号：US15471318

申请日：2017-03-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kam-Tou Sio ,  Jiann-Tyng Tzeng ,  Charles Chew-Yuen Young ,  Yi-Ming Sheu ,  Chun-Fu Cheng ,  Yi-Han Wang

IPC: H01L29/775 ,  H01L29/78 ,  H01L21/02 ,  H01L21/306 ,  H01L21/762 ,  H01L29/417 ,  H01L29/423

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a dielectric layer. The semiconductor device structure also includes a gate stack structure in the dielectric layer. The semiconductor device structure further includes a semiconductor wire partially surrounded by the gate stack structure. In addition, the semiconductor device structure includes a contact electrode in the dielectric layer and electrically connected to the semiconductor wire. The contact electrode and the gate stack structure extend from the semiconductor wire in opposite directions.