公开(公告)号：US20240021693A1

公开(公告)日：2024-01-18

申请号：US18366848

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuei-Lun Lin ,  Yen-Fu Chen ,  Po-Ting Lin ,  Chia-Yuan Chang ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L29/42368 ,  H01L29/7856 ,  H01L21/28194 ,  H01L29/66795 ,  H01L29/513

Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.

公开(公告)号：US20210126101A1

公开(公告)日：2021-04-29

申请号：US17018031

申请日：2020-09-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuei-Lun Lin ,  Yen-Fu Chen ,  Po-Ting Lin ,  Chia-Yuan Chang ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28

Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.

公开(公告)号：US12170321B2

公开(公告)日：2024-12-17

申请号：US17018031

申请日：2020-09-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuei-Lun Lin ,  Yen-Fu Chen ,  Po-Ting Lin ,  Chia-Yuan Chang ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L29/423 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/51

Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.