公开(公告)号：US10804234B2

公开(公告)日：2020-10-13

申请号：US16382503

申请日：2019-04-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Bor-Ping Jang ,  Hsiao-Chung Liang

IPC: H01L25/10 ,  H01L23/14 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

Abstract: The present disclosure, in some embodiments, relates to a semiconductor structure. The semiconductor structure includes a substrate and a first conductive pad arranged over the substrate. A boundary structure is on an upper surface of the substrate around the first conductive pad. The boundary structure has one or more sidewalls defining an opening with a round shape over the first conductive pad.

公开(公告)号：US11444002B2

公开(公告)日：2022-09-13

申请号：US16941541

申请日：2020-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Lai ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Hsiao-Chung Liang ,  Hao-Yi Tsai ,  Chien-Ling Hwang ,  Kuo-Lung Pan ,  Pei-Hsuan Lee ,  Tin-Hao Kuo ,  Chih-Hsuan Tai

IPC: H01L23/40 ,  H01L23/58 ,  H01L25/18 ,  H01L23/00

Abstract: A package structure includes a bottom plate, a semiconductor package, a top plate, a screw and an anti-loosening coating. The semiconductor package is disposed over the bottom plate. The top plate is disposed over the semiconductor package, and includes an internal thread in a screw hole of the top plate. The screw penetrates through the bottom plate, the semiconductor package and the top plate, and includes an external thread. The external thread of the screw is engaged to the internal thread of the top plate, and the anti-loosening coating is adhered between the external thread and the internal thread.

公开(公告)号：US20220037228A1

公开(公告)日：2022-02-03

申请号：US16941541

申请日：2020-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Lai ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Hsiao-Chung Liang ,  Hao-Yi Tsai ,  Chien-Ling Hwang ,  Kuo-Lung Pan ,  Pei-Hsuan Lee ,  Tin-Hao Kuo ,  Chih-Hsuan Tai

IPC: H01L23/40 ,  H01L23/58 ,  H01L25/18 ,  H01L23/00

Abstract: A package structure includes a bottom plate, a semiconductor package, a top plate, a screw and an anti-loosening coating. The semiconductor package is disposed over the bottom plate. The top plate is disposed over the semiconductor package, and includes an internal thread in a screw hole of the top plate. The screw penetrates through the bottom plate, the semiconductor package and the top plate, and includes an external thread. The external thread of the screw is engaged to the internal thread of the top plate, and the anti-loosening coating is adhered between the external thread and the internal thread.

公开(公告)号：US10276531B2

公开(公告)日：2019-04-30

申请号：US15596392

申请日：2017-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Bor-Ping Jang ,  Hsiao-Chung Liang

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/14 ,  H01L23/498 ,  H01L21/48

Abstract: The present disclosure relates to a semiconductor device. In some embodiments, the semiconductor device has a first plurality of conductive pads arranged over a first substrate. A conductive solder material is arranged over and is electrically connected to the first plurality of conductive pads. A first boundary structure separates each conductive pad of the first plurality of conductive pads from an adjacent conductive pad of the first plurality of conductive pads. A die is arranged over the first substrate. The die has outermost sidewalls that are laterally separated from first and second ones of the first plurality of conductive pads by the first boundary structure.

公开(公告)号：US11233032B2

公开(公告)日：2022-01-25

申请号：US16703095

申请日：2019-12-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yeong-Jyh Lin ,  Hsin-Hung Liao ,  Chien-Ling Hwang ,  Bor-Ping Jang ,  Hsiao-Chung Liang ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L21/48 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L25/11 ,  H01L25/03

Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.

公开(公告)号：US20190237422A1

公开(公告)日：2019-08-01

申请号：US16382503

申请日：2019-04-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Bor-Ping Jang ,  Hsiao-Chung Liang

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48 ,  H01L23/14

Abstract: The present disclosure, in some embodiments, relates to a semiconductor structure. The semiconductor structure includes a substrate and a first conductive pad arranged over the substrate. A boundary structure is on an upper surface of the substrate around the first conductive pad. The boundary structure has one or more sidewalls defining an opening with a round shape over the first conductive pad.

公开(公告)号：US09768142B2

公开(公告)日：2017-09-19

申请号：US13944334

申请日：2013-07-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yeong-Jyh Lin ,  Hsin-Hung Liao ,  Chien Ling Hwang ,  Bor-Ping Jang ,  Hsiao-Chung Liang ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L21/48 ,  H01L25/03 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/45147 ,  H01L2224/48225 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.

公开(公告)号：US20170256513A1

公开(公告)日：2017-09-07

申请号：US15596392

申请日：2017-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Bor-Ping Jang ,  Hsiao-Chung Liang

IPC: H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L24/14 ,  H01L21/4853 ,  H01L23/147 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/32 ,  H01L25/105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3841 ,  H01L2924/0665 ,  H01L2924/00

Abstract: The present disclosure relates to a semiconductor device. In some embodiments, the semiconductor device has a first plurality of conductive pads arranged over a first substrate. A conductive solder material is arranged over and is electrically connected to the first plurality of conductive pads. A first boundary structure separates each conductive pad of the first plurality of conductive pads from an adjacent conductive pad of the first plurality of conductive pads. A die is arranged over the first substrate. The die has outermost sidewalls that are laterally separated from first and second ones of the first plurality of conductive pads by the first boundary structure.