公开(公告)号：US10475772B2

公开(公告)日：2019-11-12

申请号：US16216133

申请日：2018-12-11

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58 ,  H01L23/00 ,  H01L25/00

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US10777539B2

公开(公告)日：2020-09-15

申请号：US16584689

申请日：2019-09-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58 ,  H01L23/00 ,  H01L25/00

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US10163973B2

公开(公告)日：2018-12-25

申请号：US15461719

申请日：2017-03-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Feng-Kuei Chang ,  Keng-Yu Chou ,  Jen-Cheng Liu ,  Jeng-Shyan Lin

IPC分类号： H01L27/146 ,  G02B6/43 ,  G02B6/42

摘要： A method for forming an FSI image sensor device structure is provided. The method includes forming a pixel region in a substrate and forming a dielectric layer over the substrate. The method includes forming a trench through the dielectric layer, and the trench includes a top portion and a bottom portion, and the trench is directly above the pixel region. The method includes forming a protection layer in the bottom portion of the trench and enlarging a top width of the top portion of the trench, and the trench has a wide top portion and a narrow bottom portion. The wide top portion has top sidewall surfaces, the narrow bottom portion has bottom sidewall surfaces, and the top sidewall surfaces taper gradually toward the bottom sidewall surfaces. The method includes filling a transparent dielectric layer in the trench to form a light pipe.

公开(公告)号：US10157895B2

公开(公告)日：2018-12-18

申请号：US15954772

申请日：2018-04-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L21/768 ,  H01L23/52 ,  H01L23/528 ,  H01L25/065 ,  H01L21/311 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L23/58 ,  H01L23/00 ,  H01L25/00

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US09972603B2

公开(公告)日：2018-05-15

申请号：US15383419

申请日：2016-12-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L21/768 ,  H01L23/31 ,  H01L25/065 ,  H01L21/311 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/31111 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/585 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/24145 ,  H01L2225/06541

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US20200027860A1

公开(公告)日：2020-01-23

申请号：US16584689

申请日：2019-09-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58 ,  H01L23/00 ,  H01L25/00

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US20190109121A1

公开(公告)日：2019-04-11

申请号：US16216133

申请日：2018-12-11

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L23/522 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L21/311 ,  H01L23/528 ,  H01L23/58

CPC分类号： H01L25/0657 ,  H01L21/31111 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/585 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/24145 ,  H01L2225/06541

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US20180233490A1

公开(公告)日：2018-08-16

申请号：US15954772

申请日：2018-04-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L23/58 ,  H01L21/768 ,  H01L25/00 ,  H01L23/00 ,  H01L21/311 ,  H01L23/528 ,  H01L23/522 ,  H01L23/48 ,  H01L23/31

CPC分类号： H01L25/0657 ,  H01L21/31111 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/585 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/24145 ,  H01L2225/06541

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.

公开(公告)号：US20170186732A1

公开(公告)日：2017-06-29

申请号：US15383419

申请日：2016-12-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Shin Chu ,  Kuan-Chieh Huang ,  Pao-Tung Chen ,  Shuang-Ji Tsai ,  Yi-Hao Chen ,  Feng-Kuei Chang

IPC分类号： H01L25/065 ,  H01L23/528 ,  H01L23/522 ,  H01L23/00 ,  H01L23/48 ,  H01L25/00 ,  H01L21/311 ,  H01L21/768 ,  H01L23/58 ,  H01L23/31

CPC分类号： H01L25/0657 ,  H01L21/31111 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/585 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/24145 ,  H01L2225/06541

摘要： A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.