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公开(公告)号:US20180350913A1
公开(公告)日:2018-12-06
申请号:US15675535
申请日:2017-08-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shin-Yi YANG , Ching-Fu YEH , Ming-Han LEE , Shau-Lin SHUE
IPC: H01L29/16 , H01L23/522 , H01L21/768
CPC classification number: H01L29/1606 , H01L21/76864 , H01L21/76877 , H01L23/5226 , H01L23/53214 , H01L23/53228 , H01L23/53242 , H01L23/53257
Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor interconnect structure incorporating a graphene barrier layer. The present disclosure provides a method of forming a graphene barrier layer by thermally annealing amorphous carbon layers on metal catalyst surfaces. The thickness of the graphene barrier layers can be selected by varying the thickness of the amorphous carbon layer.
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公开(公告)号:US20190131408A1
公开(公告)日:2019-05-02
申请号:US16227592
申请日:2018-12-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shin-Yi YANG , Ching-Fu YEH , Ming-Han LEE , Shau-Lin SHUE
IPC: H01L29/16 , H01L23/522 , H01L21/768 , H01L23/532
Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor interconnect structure incorporating a graphed barrier layer. The present disclosure provides a method of forming a graphed barrier layer by thermally annealing amorphous carbon layers on metal catalyst surfaces. The thickness of the graphed barrier layers can be selected by varying the thickness of the amorphous carbon layer.
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公开(公告)号:US20160379875A1
公开(公告)日:2016-12-29
申请号:US15263249
申请日:2016-09-12
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Hung LIN , Ching-Fu YEH , Hsin-Chen TSAI , Yao-Hsiang LIANG , Yu-Min CHANG , Shih-Chi LIN
IPC: H01L21/768 , H01L23/532
CPC classification number: H01L21/76846 , H01L21/76876 , H01L21/76879 , H01L23/53228 , H01L23/53233 , H01L23/53238 , H01L23/53266 , H01L2924/0002 , H01L2924/00
Abstract: An improved interconnect structure and a method for forming the interconnect structure is disclosed that allows the interconnect structure to achieve a lower Rc. To lower the Rc of the interconnect structure, an α-phase inducing metal layer is introduced on a first Ta barrier layer of β phase to induce the subsequent deposition of Ta thereon into the formation of an α-phase Ta barrier layer. The subsequently deposited Ta barrier layer with a primary crystallographic structure of α phase has a lower Rc than that of the β-phase Ta barrier layer.
Abstract translation: 公开了改进的互连结构和用于形成互连结构的方法,其允许互连结构实现较低的Rc。 为了降低互连结构的Rc,在β相的第一Ta阻挡层上引入α相诱导金属层,以引起其后的Ta沉积形成α相Ta阻挡层。 具有α相的主晶体结构的随后沉积的Ta阻挡层具有比β相Ta阻挡层低的Rc。
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