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公开(公告)号：US09755586B2
公开(公告)日：2017-09-05
申请号：US15035561
申请日：2014-11-18
申请人： Thales
CPC分类号： H03F1/52 , H03F3/19 , H03F2200/211 , H03F2200/294 , H03F2200/444 , H03F2200/451 , H03G7/00 , H03G11/00 , H03G11/002 , H03G11/02 , H03G11/06
摘要： This radiofrequency power limiter includes at least one transistor, a drain of the transistor being directly connected to a mesh connecting an input to an output of the limiter, a source of the transistor being connected to a common reference potential, and a gate of the transistor being connected to a common control potential. The transistor is not biased between its drain and its source during operation of the limiter.
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公开(公告)号：US20180145413A1
公开(公告)日：2018-05-24
申请号：US15876667
申请日：2018-01-22
申请人： THALES
IPC分类号： H01Q9/04
CPC分类号： H01Q9/0435 , H01Q9/0457 , H01Q9/0478 , H01Q23/00
摘要： A transceiver device and associated antenna are disclosed. In one aspect, the transceiver device combines first and second transceiver modules with a transceiver capability including a substantially planar radiating element and including a central point. Each transceiver module is a transceiver module coupled with the transceiver capability so as to excite a pair of excitation points of the radiating element, the excitation points of one pair being arranged symmetrically relative to the central point of the radiating element. The first and second transceiver modules respectively excite a first pair of excitation points arranged in a first direction of the radiating element and a second pair of excitation points arranged in a second direction of the radiating element, the first and second directions being mutually orthogonal.
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公开(公告)号：US10454175B2
公开(公告)日：2019-10-22
申请号：US15876667
申请日：2018-01-22
申请人： THALES
摘要： A transceiver device and associated antenna are disclosed. In one aspect, the transceiver device combines first and second transceiver modules with a transceiver capability including a substantially planar radiating element and including a central point. Each transceiver module is a transceiver module coupled with the transceiver capability so as to excite a pair of excitation points of the radiating element, the excitation points of one pair being arranged symmetrically relative to the central point of the radiating element. The first and second transceiver modules respectively excite a first pair of excitation points arranged in a first direction of the radiating element and a second pair of excitation points arranged in a second direction of the radiating element, the first and second directions being mutually orthogonal.
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公开(公告)号：US10276255B2
公开(公告)日：2019-04-30
申请号：US15866474
申请日：2018-01-10
申请人： Thales
发明人： Arnaud Meyer , Bruno Louis , Rémi Corbiere , Vincent Petit , Patricia Desgreys , Hervé Petit
摘要： Sample-and-hold device for an electrical signal including an input module having two inputs, including a first switching block including two input switches, each input of the input module being connected at the input of one of the input switches, the input module being connected at the input of a first track-and-hold module with two inputs and two outputs, so as to alternately convey the signal from one of the two inputs to one of the two inputs of the first track-and-hold module; the device including a second track-and-hold module connected in parallel with the first track-and-hold module, these track-and-hold modules connected at the output of the first switching block, and an output module including a second switching block including two output switches, the outputs of the first and second track-and-hold modules being connected to the inputs of the output switches, to time interleave the output signals of the track-and-hold modules.
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公开(公告)号：US20180197618A1
公开(公告)日：2018-07-12
申请号：US15866474
申请日：2018-01-10
申请人： Thales
发明人： Arnaud Meyer , Bruno Louis , Rémi Corbiere , Vincent Petit , Patricia Desgreys , Hervé Petit
IPC分类号： G11C27/02
CPC分类号： G11C27/02 , H03M1/124 , H03M1/1245 , H03M9/00
摘要： Sample-and-hold device for an electrical signal including an input module having two inputs, including a first switching block including two input switches, each input of the input module being connected at the input of one of the input switches, the input module being connected at the input of a first track-and-hold module with two inputs and two outputs, so as to alternately convey the signal from one of the two inputs to one of the two inputs of the first track-and-hold module; the device including a second track-and-hold module connected in parallel with the first track-and-hold module, these track-and-hold modules connected at the output of the first switching block, and an output module including a second switching block including two output switches, the outputs of the first and second track-and-hold modules being connected to the inputs of the output switches, to time interleave the output signals of the track-and-hold modules.
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