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公开(公告)号：US10312914B2
公开(公告)日：2019-06-04
申请号：US15854515
申请日：2017-12-26
发明人： Xiong Li , Toru Tanaka
IPC分类号： H03K19/0952 , H02M7/537 , H03K19/017 , H03K17/22 , H03K5/19 , H03K17/06
摘要： A gate driver includes a drive signal input terminal, a drive signal output terminal, a gate drive circuit, and a serial communication interface. The drive signal input terminal is configured to receive a gate drive signal. The gate drive circuit is coupled to the drive signal input terminal and the drive signal output terminal. The gate drive circuit is configured to provide the gate drive signal to the drive signal output terminal. The serial communication interface is coupled to the drive signal input terminal.
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公开(公告)号：US11368150B2
公开(公告)日：2022-06-21
申请号：US16555482
申请日：2019-08-29
发明人： Gangyao Wang , Xiong Li , Suxuan Guo
IPC分类号： H03K17/18 , H03K17/687
摘要： A device includes an output circuit configured to drive a gate of a field effect transistor (FET) in response to a drive signal. The FET includes a body diode. Control logic is configured to generate the drive signal to control the output circuit to drive the FET. A measurement circuit is configured to sample a first voltage across the FET in response to a first state of the drive signal and configured to sample a second voltage across the FET in response to a second state of the drive signal. The second state of the drive signal is different from the first state. The control logic is configured to determine a difference between the first voltage and a reference voltage. The control logic is configured to compare the difference to a degradation threshold to determine a level of degradation of the FET. The reference voltage is determined based on the second voltage.
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公开(公告)号：US20220029618A1
公开(公告)日：2022-01-27
申请号：US17495968
申请日：2021-10-07
发明人： Xiong Li , Toru Tanaka
摘要： A system comprises a gate driver that is configured to couple to a transistor disposed in a transistor module via a first pin. The gate driver comprises a duty cycle measurement circuit having a first input terminal and a first output terminal, the first input terminal coupled to a second pin via an isolator. The duty cycle measurement circuit comprises a flip-flop, a counter, a shift register, and a comparator. The system comprises an analog to digital converter circuit having a second input terminal, a second output terminal, and a reference terminal, the second input terminal coupled to a third pin configured to couple to a temperature-sensitive device disposed in the transistor module, the second output terminal coupled to a fourth pin via the isolator, and the reference terminal coupled to the first output terminal.
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公开(公告)号：US11171640B2
公开(公告)日：2021-11-09
申请号：US15969034
申请日：2018-05-02
发明人： Xiong Li , Toru Tanaka
摘要： A system comprises a gate driver that is configured to couple to a transistor disposed in a transistor module via a first pin. The gate driver comprises a duty cycle measurement circuit having a first input terminal and a first output terminal, the first input terminal coupled to a second pin via an isolator. The duty cycle measurement circuit comprises a flip-flop, a counter, a shift register, and a comparator. The system comprises an analog to digital converter circuit having a second input terminal, a second output terminal, and a reference terminal, the second input terminal coupled to a third pin configured to couple to a temperature-sensitive device disposed in the transistor module, the second output terminal coupled to a fourth pin via the isolator, and the reference terminal coupled to the first output terminal.
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公开(公告)号：US20200153437A1
公开(公告)日：2020-05-14
申请号：US16741898
申请日：2020-01-14
发明人： Xiong Li , Toru Tanaka
IPC分类号： H03K19/0952 , H02M7/5387 , H03K17/06 , H03K5/19 , H03K17/22 , H03K19/017 , H02M7/537
摘要： A gate driver includes a drive signal input terminal, a drive signal output terminal, a gate drive circuit, and a serial communication interface. The drive signal input terminal is configured to receive a gate drive signal. The gate drive circuit is coupled to the drive signal input terminal and the drive signal output terminal. The gate drive circuit is configured to provide the gate drive signal to the drive signal output terminal. The serial communication interface is coupled to the drive signal input terminal.
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公开(公告)号：US10587268B2
公开(公告)日：2020-03-10
申请号：US16388353
申请日：2019-04-18
发明人： Xiong Li , Toru Tanaka
IPC分类号： H03K19/0952 , H02M7/537 , H03K19/017 , H03K17/22 , H03K5/19 , H03K17/06 , H02M7/5387
摘要： A gate driver includes a drive signal input terminal, a drive signal output terminal, a gate drive circuit, and a serial communication interface. The drive signal input terminal is configured to receive a gate drive signal. The gate drive circuit is coupled to the drive signal input terminal and the drive signal output terminal. The gate drive circuit is configured to provide the gate drive signal to the drive signal output terminal. The serial communication interface is coupled to the drive signal input terminal.
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公开(公告)号：US10291225B2
公开(公告)日：2019-05-14
申请号：US15728230
申请日：2017-10-09
发明人： Xiong Li , Anant Kamath
IPC分类号： H03K17/18 , H03K17/567 , G01R31/28
摘要： An isolated insulated gate bipolar transistor (IGBT) gate driver is provided which integrates circuits, in-module, to support the measurements of threshold voltage, and collector-emitter saturation voltage of IGBTs. The measured gate threshold and collector-emitter saturation voltage can be used as precursors for state of health predictions for IGBTs. During the measurements, IGBTs are biased under specific conditions chosen to quickly elicit collector-emitter saturation and gate threshold information. Integrated analog-to-digital converter (ADC) circuits are used to convert measured analog signals to a digital format. The digitalized signals are transferred to a micro controller unit (MCU) for further processing through serial peripheral interface (SPI) circuits.
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公开(公告)号：US11239839B2
公开(公告)日：2022-02-01
申请号：US17014828
申请日：2020-09-08
发明人： Xiong Li , Anant Kamath
IPC分类号： G01R31/26 , H03K17/18 , H03K17/567 , G01R31/28 , G01R31/42
摘要： In a power supply system, a high-side (HS) insulated-gate bipolar transistor (IGBT) has a first collector, a first gate, and a first emitter. A low-side (LS) IGBT has a second collector coupled to the first emitter, a second gate, and a second emitter. A gate drive circuit is coupled to the first gate of the HS IGBT and the second gate of the LS IGBT. A control circuit is coupled to the gate drive circuit. The control circuit is configured to control the gate drive circuit for biasing the HS IGBT to a HS saturation, and determine a HS degradation of the HS IGBT based on a HS digitized gate voltage of the HS IGBT in the HS saturation.
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公开(公告)号：US10992293B2
公开(公告)日：2021-04-27
申请号：US16137146
申请日：2018-09-20
发明人： Xiong Li , William Toth , Honglin Guo , Danyang Zhu
IPC分类号： H03K17/08 , H03K17/081
摘要： A device that comprises a first semiconductor die and a second semiconductor die. The first semiconductor die comprises a first clock signal generator. The second semiconductor die comprises a fault detection circuit, the fault detection circuit comprising a second clock signal generator, a first counter coupled to the second clock signal generator, multiple storage devices coupled to the second clock signal generator and to the first counter, a logic gate coupled to the multiple storage devices, a second counter coupled to the logic gate and to the first clock signal generator, and a comparator coupled to the logic gate and the second counter.
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公开(公告)号：US10771052B2
公开(公告)日：2020-09-08
申请号：US16371331
申请日：2019-04-01
发明人： Xiong Li , Anant Kamath
IPC分类号： H03K17/18 , H03K17/567 , G01R31/28 , G01R31/26 , G01R31/42
摘要： An isolated insulated gate bipolar transistor (IGBT) gate driver is provided which integrates circuits, in-module, to support the measurements of threshold voltage, and collector-emitter saturation voltage of IGBTs. The measured gate threshold and collector-emitter saturation voltage can be used as precursors for state of health predictions for IGBTs. During the measurements, IGBTs are biased under specific conditions chosen to quickly elicit collector-emitter saturation and gate threshold information. Integrated analog-to-digital converter (ADC) circuits are used to convert measured analog signals to a digital format. The digitalized signals are transferred to a micro controller unit (MCU) for further processing through serial peripheral interface (SPI) circuits.
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