公开(公告)号：US20220116030A1

公开(公告)日：2022-04-14

申请号：US17558794

申请日：2021-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sriram MURALI ,  Jaiganesh BALAKRISHNAN ,  Ram Narayan KRISHNA NAMA MONY ,  Pooja SUNDAR

IPC: H03K5/1252 ,  G11C19/28 ,  G06F1/10 ,  G06F1/08 ,  H03K19/21

Abstract: A circuit includes a noise generator and a delay element. The output of the noise generator couples to the input of the delay element. The output of the delay element is coupled to a first input of a logic circuit, and the output of the noise generator is coupled to a second input of the logic circuit. The output of the logic circuit is coupled to a first control input of a waveform storage circuit. The waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic circuit and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic circuit. A sequencer has a sequencer output coupled to the second control input of the waveform storage circuit.

公开(公告)号：US20200169434A1

公开(公告)日：2020-05-28

申请号：US16684842

申请日：2019-11-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jawaharlal TANGUDU ,  Sashidharan VENKATRAMAN ,  Sarma Sundareswara GUNTURI ,  Chandrasekhar SRIRAM ,  Sthanunathan RAMAKRISHNAN ,  Ram Narayan KRISHNA NAMA MONY

IPC: H04L25/02 ,  H04B17/11 ,  H04B1/02

Abstract: A channel estimation method and system for IQ imbalance and local oscillator leakage correction, wherein an example of a channel estimation system comprising a calibrating signal generator configured to generate at least one pair of calibrating signals, a feedback IQ mismatch estimator configured to measure feedback IQ mismatch estimates based on the pair of calibrating signals, and a calibrating signal based channel estimator configured to generate a channel estimate based on the pair of calibrating signals and the feedback IQ mismatch estimates.

公开(公告)号：US20210119622A1

公开(公告)日：2021-04-22

申请号：US17071302

申请日：2020-10-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sriram MURALI ,  Jaiganesh BALAKRISHNAN ,  Ram Narayan KRISHNA NAMA MONY ,  Pooja SUNDAR

IPC: H03K5/1252 ,  G06F1/10 ,  G11C19/28 ,  H03K19/21 ,  G06F1/08 ,  H03K5/00

Abstract: A circuit includes a noise generator and a delay element. The output of the noise generator couples to the input of the delay element. The output of the delay element is coupled to a first input of a logic circuit, and the output of the noise generator is coupled to a second input of the logic circuit. The output of the logic circuit is coupled to a first control input of a waveform storage circuit. The waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic circuit and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic circuit. A sequencer has a sequencer output coupled to the second control input of the waveform storage circuit.