Three-level converter using an auxiliary switched capacitor circuit

    公开(公告)号:US11101735B2

    公开(公告)日:2021-08-24

    申请号:US16584610

    申请日:2019-09-26

    IPC分类号: H02M3/158 H02M7/483 H02M1/00

    摘要: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.

    Compensated active electro-magnetic interference filters

    公开(公告)号:US10374510B2

    公开(公告)日:2019-08-06

    申请号:US15715975

    申请日:2017-09-26

    IPC分类号: H02M1/44 H02M1/12

    摘要: An active electromagnetic interference (EMI) filter includes an amplifier configured to sense noise signals on a power conductor, and drive a cancellation signal onto the power conductor. The cancellation signal is to reduce the amplitude of the noise signals. Some embodiments of the active EMI filter include a high frequency compensation network that improves the high frequency phase margin of the active EMI filter and improves the stability of the active EMI filter at high frequencies. Some embodiments of the active EMI filter include a low frequency compensation capacitor that increases the phase margin of the active EMI filter at low frequencies. Some embodiments of the active EMI filter include low frequency compensation circuitry that increases the low frequency tolerance of the active EMI filter.

    POWER COMBINER AND BALANCER
    6.
    发明申请

    公开(公告)号:US20180150092A1

    公开(公告)日:2018-05-31

    申请号:US15882670

    申请日:2018-01-29

    摘要: A power combining technique includes receiving a first voltage at a first input and a second voltage at a second input. The power combining technique further includes combining, with at least two power converters, power received from the first and second inputs into a single power rail. A power balancing technique further includes controlling the at least two power converters such that a first one of the power converters outputs an amount of current to the single power rail that is proportional to and/or equal to the amount of current output by another of the power converters.

    POWER COMBINER AND BALANCER
    7.
    发明申请

    公开(公告)号:US20200293073A1

    公开(公告)日:2020-09-17

    申请号:US16889892

    申请日:2020-06-02

    摘要: A power combining technique includes receiving a first voltage at a first input and a second voltage at a second input. The power combining technique further includes combining, with at least two power converters, power received from the first and second inputs into a single power rail. A power balancing technique further includes controlling the at least two power converters such that a first one of the power converters outputs an amount of current to the single power rail that is proportional to and/or equal to the amount of current output by another of the power converters.

    METHODS AND APPARATUS FOR ADAPTIVE TIMING FOR ZERO VOLTAGE TRANSITION POWER CONVERTERS

    公开(公告)号:US20200067410A1

    公开(公告)日:2020-02-27

    申请号:US16670638

    申请日:2019-10-31

    IPC分类号: H02M3/158 H02M1/08

    摘要: Timing circuitry causes: a first closed signal on a first switch control output before a signal on a second switch control output changes from a second closed signal to a first open signal; the first switch control output to provide a second open signal after a first selected time after the second switch control output changes from the second closed signal to the first open signal; and a third switch control output to provide a third closed signal a second selected time after the first switch control output changes from the first closed signal to a third open signal. A beginning of the first closed signal to a beginning of the first open signal is based on a later of: a current through a switch connected to the second switch control output exceeding a threshold current; and a clocked time after the beginning of the first closed signal.

    Three-level converter using an auxiliary switched capacitor circuit

    公开(公告)号:US10468988B2

    公开(公告)日:2019-11-05

    申请号:US16058859

    申请日:2018-08-08

    IPC分类号: H02M3/158 H02M1/00 H02M7/483

    摘要: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.