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公开(公告)号:US20230412186A1
公开(公告)日:2023-12-21
申请号:US18461152
申请日:2023-09-05
Applicant: Texas Instruments Incorporated
Inventor: Nagarajan VISWANATHAN , Himanshu VARSHNEY , Vinam ARORA , Charls BABU , Srinivas Kumar NARU
CPC classification number: H03M1/502 , H03M1/1009 , H03M1/362
Abstract: In an example, a system includes an input channel and a voltage to delay converter (V2D) coupled to the input channel. The system also includes a first multiplexer coupled to the V2D and an analog-to-digital converter (ADC) coupled to the first multiplexer. The system includes a second multiplexer coupled to the input channel and an auxiliary ADC coupled to the second multiplexer. The system includes calibration circuitry coupled to an output of the auxiliary ADC, where the calibration circuitry is configured to correct a non-linearity in a signal provided by the input channel. The calibration circuitry is also configured to determine the non-linearity of the signal provided to the ADC relative to the signal provided to the auxiliary ADC.
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公开(公告)号:US20170041014A1
公开(公告)日:2017-02-09
申请号:US15048027
申请日:2016-02-19
Applicant: Texas Instruments Incorporated
Inventor: Neeraj SHRIVASTAVA , Supreet JOSHI , Himanshu VARSHNEY , Jafar Sadique KAVILADATH , Visvesvaraya PENTAKOTA , Shagun DUSAD
CPC classification number: H03M1/1009 , H03M1/1019 , H03M1/1057 , H03M1/66 , H03M1/742 , H03M1/745 , H03M1/785
Abstract: The disclosure provides a current steering digital to analog converter (DAC) that includes a plurality of DAC elements. At least one DAC element of the plurality of DAC elements is coupled to a calibration circuit. The calibration circuit includes a fixed current source coupled to a primary node of the DAC element through a first estimation switch. A digital code generator is coupled to the primary node, and generates a first digital code corresponding to a primary voltage generated at the primary node. The digital code generator generates a second digital code. A correction DAC is coupled to the digital code generator and generates a bias voltage based on the second digital code. The bias voltage is provided to the DAC element such that a current flowing through each DAC element of the plurality of DAC elements is equal.
Abstract translation: 本公开提供了包括多个DAC元件的电流转向数模转换器(DAC)。 多个DAC元件中的至少一个DAC元件耦合到校准电路。 校准电路包括通过第一估计开关耦合到DAC元件的主节点的固定电流源。 数字码发生器耦合到主节点,并且产生对应于在主节点处产生的主电压的第一数字码。 数字代码生成器产生第二数字代码。 校正DAC耦合到数字代码发生器并且基于第二数字代码产生偏置电压。 偏置电压被提供给DAC元件,使得流过多个DAC元件中的每个DAC元件的电流相等。
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公开(公告)号:US20230082872A1
公开(公告)日:2023-03-16
申请号:US17589533
申请日:2022-01-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Nagarajan VISWANATHAN , Himanshu VARSHNEY , Vinam ARORA , Charls BABU , Srinivas Kumar NARU
Abstract: In an example, a system includes an input channel and a voltage to delay converter (V2D) coupled to the input channel. The system also includes a first multiplexer coupled to the V2D and an analog-to-digital converter (ADC) coupled to the first multiplexer. The system includes a second multiplexer coupled to the input channel and an auxiliary ADC coupled to the second multiplexer. The system includes calibration circuitry coupled to an output of the auxiliary ADC, where the calibration circuitry is configured to correct a non-linearity in a signal provided by the input channel. The calibration circuitry is also configured to determine the non-linearity of the signal provided to the ADC relative to the signal provided to the auxiliary ADC.
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公开(公告)号:US20250055473A1
公开(公告)日:2025-02-13
申请号:US18931734
申请日:2024-10-30
Applicant: Texas Instruments Incorporated
Inventor: Nagarajan VISWANATHAN , Himanshu VARSHNEY , Vinam ARORA , Charls BABU , Srinivas Kumar NARU
Abstract: In an example, a system includes an input channel and a voltage to delay converter (V2D) coupled to the input channel. The system also includes a first multiplexer coupled to the V2D and an analog-to-digital converter (ADC) coupled to the first multiplexer. The system includes a second multiplexer coupled to the input channel and an auxiliary ADC coupled to the second multiplexer. The system includes calibration circuitry coupled to an output of the auxiliary ADC, where the calibration circuitry is configured to correct a non-linearity in a signal provided by the input channel. The calibration circuitry is also configured to determine the non-linearity of the signal provided to the ADC relative to the signal provided to the auxiliary ADC.
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公开(公告)号:US20210105021A1
公开(公告)日:2021-04-08
申请号:US17061730
申请日:2020-10-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jawaharlal TANGUDU , Pankaj GUPTA , Sreenath Narayanan POTTY , Ajai PAULOSE , Chandrasekhar SRIRAM , Mahesh Ravi VARMA , Shabbar Abbasi VEJLANI , Neeraj SHRIVASTAVA , Himanshu VARSHNEY , Divyeshkumar Mahendrabhai PATEL , Raju Kharataram CHAUDHARI
Abstract: A non-linearity correction circuit includes a non-linearity coefficient estimation circuit. The non-linearity coefficient estimation circuit includes a data capture circuit, a non-linearity term generation circuit, a time-to-frequency conversion circuit, a bin identification circuit, a residual non-linearity conversion circuit, and a non-linearity coefficient generation circuit. The non-linearity term generation circuit is coupled to the data capture circuit. The time-to-frequency conversion circuit is coupled to the data capture circuit and the non-linearity term generation circuit. The bin identification circuit is coupled to the time-to-frequency conversion circuit. The residual non-linearity conversion circuit is coupled to the bin identification circuit. The non-linearity coefficient generation circuit is coupled to the bin identification circuit and the residual non-linearity conversion circuit.
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