-
1.发明授权公开(公告)号：US12127487B2
公开(公告)日：2024-10-22
申请号：US18058337
申请日：2022-11-23
申请人： TetraMem Inc.
发明人： Minxian Zhang , Ning Ge
CPC分类号： H10N70/826 , H10B63/80 , H10N70/841 , H10N70/8833
摘要： The present disclosure provides an apparatus, including: a substrate; a bottom electrode formed on the substrate; a first base oxide layer formed on the bottom electrode; a first geometric confining layer formed on the first base oxide layer, wherein the first geometric confining layer comprises a first plurality of pin-holes; a second base oxide layer formed on the first geometric confining layer and connected to a first top surface of the first base oxide layer via the first plurality of pin-holes; and a top electrode formed on the second base oxide layer. The first base oxide layer includes TaOx, HfOx, TiOx, ZrOx, or a combination thereof. The first geometric confining layer comprises Al2O3, SiO2, Si3N4, Y2O3, Gd2O3, Sm2O3, CeO2, Er2O3, or a combination thereof.
-
公开(公告)号：US11985911B2
公开(公告)日：2024-05-14
申请号：US17651790
申请日：2022-02-19
申请人： TetraMem Inc.
发明人： Minxian Zhang , Ning Ge
CPC分类号： H10N70/841 , H10B63/80 , H10N70/023 , H10N70/8833
摘要： Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer.
-
3.发明公开公开(公告)号：US20240276895A1
公开(公告)日：2024-08-15
申请号：US18646738
申请日：2024-04-25
申请人： TetraMem Inc.
发明人： Minxian Zhang , Ning Ge
CPC分类号： H10N70/841 , H10B63/80 , H10N70/023 , H10N70/8833
摘要： Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer.
-
公开(公告)号：US20240099023A1
公开(公告)日：2024-03-21
申请号：US18052071
申请日：2022-11-02
申请人： TetraMem Inc.
发明人： Minxian Zhang , Ning Ge
摘要： The present disclosure provides for a semiconductor device with integrated sensing and processing functionalities. The semiconductor device includes a sensing module configured to generate a plurality of analog sensing signals; and a machine learning (ML) processor. The sensing module and the ML processor are fabricated on a single wafer. The ML processor includes crossbar arrays that processes the analog sensing signals to generate analog preprocessed sensing data; an analog-to-digital converter (ADC) to convert the analog preprocessed sensing data into digital preprocessed sensing data; and a machine learning processing unit to process the digital preprocessed sensing data utilizing one or more machine learning model.
-
5.发明授权公开(公告)号：US11283018B2
公开(公告)日：2022-03-22
申请号：US16367184
申请日：2019-03-27
申请人： TETRAMEM INC.
发明人： Ning Ge , Minxian Zhang
摘要： Technologies relating to RRAM-based crossbar array circuits with increase temperature stability are disclosed. An example apparatus includes: a bottom electrode; a filament forming layer formed on the bottom electrode; and a top electrode formed on the filament forming layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer, and wherein a material of the filament includes nitrogen-doped Ta2O5, Ta2N/Ta2O5, or TaNyOz.
-
公开(公告)号：US11217630B2
公开(公告)日：2022-01-04
申请号：US16393883
申请日：2019-04-24
申请人： TETRAMEM INC.
发明人： Minxian Zhang , Ning Ge
摘要： Technologies relating to implementing memristor crossbar arrays using non-filamentary RRAM cells are disclosed. In some implementations, an apparatus comprises: a first row wire; a first column wire; a non-filamentary RRAM; and an access control device. The non-filamentary RRAM and the access control device are serially connected; the non-filamentary RRAM and the access control device connect the first row wire with the first column wire. The non-filamentary RRAM and the access control device may form a cross-point device. The cross-point device may be less than 40×40 nm2. A set current of the non-filamentary RRAM may be no more than 10 μA; and a reset current of the non-filamentary RRAM is no more than 10 μA. The access control device may comprise a transistor or a selector.
-
公开(公告)号：US11177438B2
公开(公告)日：2021-11-16
申请号：US16421166
申请日：2019-05-23
申请人： TETRAMEM INC.
发明人： Minxian Zhang , Ning Ge
摘要： An example method includes: forming a bottom electrode on a substrate and forming a patterned mask layer on the bottom electrode; thermal oxidizing the bottom electrode layer via the patterned mask layer by applying a thermal process and a first plasma; removing a gaseous status of the bottom electrode oxide using a first vacuum purge; removing a solid status of the bottom electrode oxide by applying a second plasma; removing the gaseous status and the solid status of the bottom electrode oxide using a second vacuum purge to form a patterned bottom electrode; removing the patterned mask layer; forming a filament forming layer on the patterned bottom electrode; and a top electrode on the filament forming layer. The filament forming layer is configured to form a filament within the filament forming layer responsive to a switching voltage being applied to the filament forming layer.
-
公开(公告)号：US10930706B2
公开(公告)日：2021-02-23
申请号：US16392227
申请日：2019-04-23
申请人： TETRAMEM INC.
发明人： Ning Ge , Minxian Zhang
摘要： Systems and methods for reducing RRAM relaxation in crossbar array circuits for low current applications are provided. In some implementations, an apparatus comprises: a first row wire; a first column wire; an RRAM device; an access control device, wherein the RRAM device and the access control device serially connected and connecting between the first row wire and the first column wire, and wherein the RRAM device comprises: a first electrode; a first switching layer formed on the first electrode; and a second electrode formed on the first switching layer, wherein the first switching layer is doped with a first oxide material comprising SiO2, or Al2O3. The first electrode and the second electrode are, in some implementations, made of one of the following materials: Pt, Pd, Ta, Ti, Hf, W, TiN, and TaN.
-
公开(公告)号：US20200343305A1
公开(公告)日：2020-10-29
申请号：US16393883
申请日：2019-04-24
申请人： TETRAMEM INC.
发明人： Minxian Zhang , Ning Ge
摘要： Technologies relating to implementing memristor crossbar arrays using non-filamentary RRAM cells are disclosed. In some implementations, an apparatus comprises: a first row wire; a first column wire; a non-filamentary RRAM; and an access control device. The non-filamentary RRAM and the access control device are serially connected; the non-filamentary RRAM and the access control device connect the first row wire with the first column wire. The non-filamentary RRAM and the access control device may form a cross-point device. The cross-point device may be less than 40×40 nm2. A set current of the non-filamentary RRAM may be no more than 10 μA; and a reset current of the non-filamentary RRAM is no more than 10 μA. The access control device may comprise a transistor or a selector.
-
公开(公告)号：US20240095512A1
公开(公告)日：2024-03-21
申请号：US17932432
申请日：2022-09-15
申请人： TetraMem Inc.
发明人： Minxian Zhang , Ning Ge
摘要： The present disclosure provides for a semiconductor device with integrated sensing and processing functionalities. The semiconductor device includes a sensing module configured to generate a plurality of analog sensing signals; one or more crossbar arrays configured to process the analog sensing signals to generate analog preprocessed sensing data; an analog-to-digital converter (ADC) configured to convert the analog preprocessed sensing data into digital preprocessed sensing data; and a machine learning processing unit configured to process the digital preprocessed sensing data utilizing one or more machine learning model. The machine learning processing unit, the crossbar arrays, and the ADC are integrated into a processor wafer of the semiconductor device. The sensing module is integrated in a sensor wafer stacked on the processor wafer.
-
-
-
-
-
-
-
-
-
搜索结果
43 条记录 (耗时 0.017 秒)
