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公开(公告)号:US20240055300A1
公开(公告)日:2024-02-15
申请号:US17887320
申请日:2022-08-12
发明人: Wei-Ting CHANG , Kuo-Ju CHEN , Tien-Shun CHANG , Su-Hao LIU , Huicheng CHANG
IPC分类号: H01L21/8234 , H01L29/66
CPC分类号: H01L21/823431 , H01L29/66545
摘要: A method includes forming a fin structure over a substrate; depositing a dummy gate layer over the substrate and the fin structure; depositing a hard mask stack over the dummy gate layer; depositing a photoresist bottom layer over the hard mask stack, wherein the photoresist bottom layer has a first stress; performing an implantation process to the photoresist bottom layer to form an implanted bottom layer with a second stress closer to 0 than the first stress; patterning the implanted bottom layer; patterning the hard mask stack and the dummy gate layer by using the patterned implanted bottom layer as an etch mask to form a dummy gate structure over the fin structure; and replacing the dummy gate structure with a metal gate structure.
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公开(公告)号:US20230387251A1
公开(公告)日:2023-11-30
申请号:US17824690
申请日:2022-05-25
发明人: Tien-Shun CHANG , Kuo-Ju CHEN , Sih-Jie LIU , Wei-Fu WANG , Yi-Chao WANG , Li-Ting WANG , Su-Hao LIU , Huicheng CHANG , Yee-Chia YEO
IPC分类号: H01L29/66 , H01L29/78 , H01L21/265
CPC分类号: H01L29/66545 , H01L29/66795 , H01L29/7851 , H01L21/265
摘要: A method for manufacturing a semiconductor device includes: forming a patterned structure on a substrate, the patterned structure including a dielectric layer and a dummy gate structure disposed in the dielectric layer; and subjecting the patterned structure to an ion implantation process so as to modulate a profile of the dummy gate structure.
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