DCO Phase Noise With PVT-Insensitive Calibration Circuit in ADPLL Applications
    2.
    发明申请
    DCO Phase Noise With PVT-Insensitive Calibration Circuit in ADPLL Applications 有权
    ADPLL应用中具有PVT不敏感校准电路的DCO相位噪声

    公开(公告)号:US20170070231A1

    公开(公告)日:2017-03-09

    申请号:US14848713

    申请日:2015-09-09

    Abstract: A calibration procedure that uses direct measurement of digital phase error performance for low cost calibration of all-digital phase locked loop (ADPLL)/digitally-controlled oscillator (DCO) is described. Direct measurement of digital phase error, or difference in digital phase error, is used to adjust the operating point of the DCO and thereby determine the operating point that provides the optimal phase noise of the output signal. Calibration may be performed at any time so that changes in external factors such as process, voltage and temperature (PVT) may be incorporated into the setting of the operating point of the DCO.

    Abstract translation: 描述了使用全数字锁相环(ADPLL)/数字控制振荡器(DCO)的低成本校准直接测量数字相位误差性能的校准程序。 数字相位误差的直接测量或数字相位误差的差异用于调整DCO的工作点,从而确定提供输出信号的最佳相位噪声的工作点。 可以随时进行校准,以便外部因素(如过程,电压和温度)(PVT)的变化可以纳入DCO工作点的设置。

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